TOP_DARJEELING_BATCH_SIM Simulation Results (Summary)

Tuesday November 11 2025 16:10:56 UTC

GitHub Revision: b700cc2

Branch: master

Name	Passing	Total	Pass Rate	Coverage
TL_AGENT	991	1241	79.85	--
AES/UNMASKED	991	1241	79.85	92.60
AES/MASKED	991	1241	79.85	95.22
AON_TIMER	991	1241	79.85	97.12
CSRNG	991	1241	79.85	94.72
DMA	991	1241	79.85	89.64
EDN	991	1241	79.85	82.95
ENTROPY_SRC/RNG_16BITS	991	1241	79.85	80.88
HMAC	991	1241	79.85	89.95
I2C	991	1241	79.85	83.30
KEYMGR	991	1241	79.85	92.12
KEYMGR_DPE	991	1241	79.85	76.17
KMAC/MASKED	991	1241	79.85	92.42
KMAC/UNMASKED	991	1241	79.85	90.73
LC_CTRL/VOLATILE_UNLOCK_DISABLED	991	1241	79.85	89.60
LC_CTRL/VOLATILE_UNLOCK_ENABLED	991	1241	79.85	90.33
MBX	991	1241	79.85	93.61
OTBN	991	1241	79.85	93.49
PRIM_ALERT	991	1241	79.85	93.31
PRIM_ESC	991	1241	79.85	83.54
PRIM_LFSR	991	1241	79.85	98.31
PRIM_PRESENT	991	1241	79.85	93.41
PRIM_PRINCE	991	1241	79.85	100.00
ROM_CTRL/32KB	991	1241	79.85	97.73
ROM_CTRL/64KB	991	1241	79.85	98.81
RV_DM/USE_DMI_INTERFACE	991	1241	79.85	73.94
RV_TIMER	991	1241	79.85	98.10
SPI_HOST	991	1241	79.85	95.80
SPI_DEVICE/1R1W	991	1241	79.85	90.51
SRAM_CTRL/MAIN	991	1241	79.85	94.43
SRAM_CTRL/RET	991	1241	79.85	95.36
UART	991	1241	79.85	90.37
AC_RANGE_CHECK	991	1241	79.85	96.64
ALERT_HANDLER	991	1241	79.85	92.57
CLKMGR	991	1241	79.85	71.84
GPIO	991	1241	79.85	81.60
OTP_CTRL	991	1241	79.85	70.59
RSTMGR_CNSTY_CHK	991	1241	79.85	95.87
RSTMGR	991	1241	79.85	98.52
XBAR_MAIN	991	1241	79.85	94.33
XBAR_PERI	991	1241	79.85	85.30
XBAR_DBG	991	1241	79.85	98.64
XBAR_MBX	991	1241	79.85	91.36
CHIP	991	1241	79.85	66.34