Simulation Results: otbn

 
10/03/2026 16:01:41 DVSim: v1.12.0 sha: 84d71dd json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 91.11 %
  • code
  • 88.85 %
  • assert
  • 87.45 %
  • func
  • 97.03 %
  • block
  • 98.61 %
  • line
  • 98.28 %
  • branch
  • 81.28 %
  • toggle
  • 80.96 %
  • FSM
  • 94.87 %
Validation stages
V1
90.91%
V2
73.68%
V2S
62.90%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 0 1 0.00
otbn_smoke 8.645s 0.000us 0 1 0.00
single_binary 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 3.000s 0.000us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 3.000s 0.000us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 5.000s 0.000us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 3.000s 0.000us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 5.000s 0.000us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 3.000s 0.000us 1 1 100.00
otbn_csr_aliasing 3.000s 0.000us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 76.000s 0.000us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 40.000s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 0 1 0.00
otbn_reset 6.000s 0.000us 0 1 0.00
multi_error 1 1 100.00
otbn_multi_err 38.000s 0.000us 1 1 100.00
back_to_back 0 1 0.00
otbn_multi 5.000s 0.000us 0 1 0.00
stress_all 0 1 0.00
otbn_stress_all 4.000s 0.000us 0 1 0.00
lc_escalation 0 1 0.00
otbn_escalate 3.769s 0.000us 0 1 0.00
zero_state_err_urnd 1 1 100.00
otbn_zero_state_err_urnd 5.000s 0.000us 1 1 100.00
sw_errs_fatal_chk 0 1 0.00
otbn_sw_errs_fatal_chk 5.000s 0.000us 0 1 0.00
alert_test 1 1 100.00
otbn_alert_test 4.000s 0.000us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 4.000s 0.000us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 4.000s 0.000us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 4.000s 0.000us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 3.000s 0.000us 1 1 100.00
otbn_csr_rw 3.000s 0.000us 1 1 100.00
otbn_csr_aliasing 3.000s 0.000us 1 1 100.00
otbn_same_csr_outstanding 3.000s 0.000us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 3.000s 0.000us 1 1 100.00
otbn_csr_rw 3.000s 0.000us 1 1 100.00
otbn_csr_aliasing 3.000s 0.000us 1 1 100.00
otbn_same_csr_outstanding 3.000s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 0 2 0.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
otbn_dmem_err 5.169s 0.000us 0 1 0.00
internal_integrity 1 4 25.00
otbn_alu_bignum_mod_err 4.000s 0.000us 0 1 0.00
otbn_controller_ispr_rdata_err 4.000s 0.000us 0 1 0.00
otbn_mac_bignum_acc_err 4.000s 0.000us 0 1 0.00
otbn_urnd_err 4.000s 0.000us 1 1 100.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 4.000s 0.000us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 7.000s 0.000us 1 1 100.00
otbn_non_sec_partial_wipe 1 1 100.00
otbn_partial_wipe 6.000s 0.000us 1 1 100.00
tl_intg_err 2 2 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
otbn_tl_intg_err 8.000s 0.000us 1 1 100.00
passthru_mem_tl_intg_err 1 1 100.00
otbn_passthru_mem_tl_intg_err 20.000s 0.000us 1 1 100.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_mem_scramble 0 1 0.00
otbn_smoke 8.645s 0.000us 0 1 0.00
sec_cm_data_mem_integrity 0 1 0.00
otbn_dmem_err 5.169s 0.000us 0 1 0.00
sec_cm_instruction_mem_integrity 0 1 0.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 8.000s 0.000us 1 1 100.00
sec_cm_controller_fsm_global_esc 0 1 0.00
otbn_escalate 3.769s 0.000us 0 1 0.00
sec_cm_controller_fsm_local_esc 3 5 60.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
otbn_dmem_err 5.169s 0.000us 0 1 0.00
otbn_zero_state_err_urnd 5.000s 0.000us 1 1 100.00
otbn_illegal_mem_acc 4.000s 0.000us 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 3 5 60.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
otbn_dmem_err 5.169s 0.000us 0 1 0.00
otbn_zero_state_err_urnd 5.000s 0.000us 1 1 100.00
otbn_illegal_mem_acc 4.000s 0.000us 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 0 1 0.00
otbn_escalate 3.769s 0.000us 0 1 0.00
sec_cm_start_stop_ctrl_fsm_local_esc 3 5 60.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
otbn_dmem_err 5.169s 0.000us 0 1 0.00
otbn_zero_state_err_urnd 5.000s 0.000us 1 1 100.00
otbn_illegal_mem_acc 4.000s 0.000us 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 5.000s 0.000us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 5.000s 0.000us 1 1 100.00
sec_cm_rnd_bus_consistency 0 1 0.00
otbn_rnd_sec_cm 4.000s 0.000us 0 1 0.00
sec_cm_rnd_rng_digest 0 1 0.00
otbn_rnd_sec_cm 4.000s 0.000us 0 1 0.00
sec_cm_rf_base_data_reg_sw_integrity 0 1 0.00
otbn_rf_base_intg_err 4.000s 0.000us 0 1 0.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 1 1 100.00
otbn_rf_bignum_intg_err 9.000s 0.000us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
sec_cm_loop_stack_addr_integrity 0 1 0.00
otbn_stack_addr_integ_chk 5.000s 0.000us 0 1 0.00
sec_cm_call_stack_addr_integrity 0 1 0.00
otbn_stack_addr_integ_chk 5.000s 0.000us 0 1 0.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 6.000s 0.000us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_write_mem_integrity 0 1 0.00
otbn_multi 5.000s 0.000us 0 1 0.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_data_mem_sw_noaccess 0 1 0.00
otbn_sw_no_acc 4.000s 0.000us 0 1 0.00
sec_cm_key_sideload 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 176.000s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
otbn_stress_all_with_rand_reset 4.000s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
Job returned non-zero exit code
otbn_smoke 29086719516472227307729130471193806316756335102102245579252072752491730136078 None
[make]: pre_run
mkdir -p /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_smoke/latest
cd /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_smoke/latest && pushd /nightly/current_run/opentitan; source hw/ip/otbn/dv/uvm/get-toolchain-paths.sh; popd; /nightly/current_run/opentitan/hw/ip/otbn/dv/uvm/gen-binaries.py --src-dir /nightly/current_run/opentitan/hw/ip/otbn/dv/smoke /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_smoke/latest/otbn-binaries
/nightly/current_run/opentitan /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_smoke/latest
2026/03/10 16:15:39 Downloading https://releases.bazel.build/8.0.1/release/bazel-8.0.1-linux-x86_64...
Opening zip "/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)": open(): No such file or directory
FATAL: Failed to open '/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)' as a zip file: (error: 2): No such file or directory
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:52: pre_run] Error 36
otbn_dmem_err 79446665412076885899493533622246982228857781636844896537427000039057716935294 None
[make]: pre_run
mkdir -p /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_dmem_err/latest
cd /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_dmem_err/latest && pushd /nightly/current_run/opentitan; source hw/ip/otbn/dv/uvm/get-toolchain-paths.sh; popd; /nightly/current_run/opentitan/hw/ip/otbn/dv/uvm/gen-binaries.py --seed 79446665412076885899493533622246982228857781636844896537427000039057716935294 --size 2000 --count 1 /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_dmem_err/latest/otbn-binaries
/nightly/current_run/opentitan /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_dmem_err/latest
2026/03/10 16:15:41 Downloading https://releases.bazel.build/8.0.1/release/bazel-8.0.1-linux-x86_64...
Opening zip "/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)": open(): No such file or directory
FATAL: Failed to open '/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)' as a zip file: (error: 2): No such file or directory
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:52: pre_run] Error 36
otbn_escalate 77148684461004829131152165134517443557946756218316875795688619054963393120571 None
[make]: pre_run
mkdir -p /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_escalate/latest
cd /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_escalate/latest && pushd /nightly/current_run/opentitan; source hw/ip/otbn/dv/uvm/get-toolchain-paths.sh; popd; /nightly/current_run/opentitan/hw/ip/otbn/dv/uvm/gen-binaries.py --seed 77148684461004829131152165134517443557946756218316875795688619054963393120571 --size 2000 --count 1 /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_escalate/latest/otbn-binaries
/nightly/current_run/opentitan /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_escalate/latest
2026/03/10 16:15:42 Downloading https://releases.bazel.build/8.0.1/release/bazel-8.0.1-linux-x86_64...
Opening zip "/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)": open(): No such file or directory
FATAL: Failed to open '/nightly/runs/.cache/bazelisk/downloads/sha256/40f243b118f46d1c88842315e78ec5f9f6390980d67a90f7b64098613e60d65b/bin/bazel (deleted)' as a zip file: (error: 2): No such file or directory
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:52: pre_run] Error 36
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_*/otbn_model_if.sv,152): Assertion NoModelErrs has failed
otbn_multi 2028334023031461839715287535519442225063799494189859250593069058662232360015 164
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 91909213 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 91909213 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 91909213 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_imem_err 3075145626107871485500706775490234302231616398353460571840133915982487112450 122
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 7367211 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 7367211 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 7367211 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_rf_base_intg_err 1920094085836283500957520139832438597091314112035014830869005928018557809202 115
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 4183439 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 4183439 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 4183439 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stack_addr_integ_chk 13818164933192103434621544862731456395232206792455579289569583231628005500118 115
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 29868833 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 29868833 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 29868833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (otbn_env_cov.sv:2423) [cov] Check failed iss_item.insn_addr == rtl_item.insn_addr (* [*] vs * [*])
otbn_reset 95290282571425070992114166463105571029497340972524352489100065799602966344006 134
UVM_ERROR @ 71744255 ps: (otbn_env_cov.sv:2423) [uvm_test_top.env.cov] Check failed iss_item.insn_addr == rtl_item.insn_addr (0 [0x0] vs 11712 [0x2dc0])
UVM_INFO @ 71744255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@*_*.cur_cp) is an illegal value.
otbn_alu_bignum_mod_err 67900825827776934787320984900632893347731751807917172787308657921362305664107 122
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 18793049 PS + 25) Sampled value (27705693518851633) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4200_1.cur_cp) is an illegal value.
UVM_FATAL @ 18793049 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn1'
UVM_INFO @ 18793049 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_controller_ispr_rdata_err 49159667047065391012211575965623670022555913003125325749119340264692665941733 118
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 24111416 PS + 25) Sampled value (27705693502268022) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4200_1.cur_cp) is an illegal value.
UVM_FATAL @ 24111416 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subv'
UVM_INFO @ 24111416 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_mac_bignum_acc_err 96737998454639278913369598941385640338096002209826900376879720737800185837098 124
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 20400006 PS + 24) Sampled value (27705693450625899) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4200_1.cur_cp) is an illegal value.
UVM_FATAL @ 20400006 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.pack'
UVM_INFO @ 20400006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all 4646235815521980478462436048416871147512701441721631803564963264490466818394 149
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 10058242 PS + 26) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4201_1.cur_cp) is an illegal value.
UVM_FATAL @ 10058242 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 10058242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 21647563443919547235729927361003234116332216630723115374621673533460159544537 155
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 7619923 PS + 25) Sampled value (7092657536580613741) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4203_1.cur_cp) is an illegal value.
UVM_FATAL @ 7619923 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subvm'
UVM_INFO @ 7619923 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_rnd_sec_cm 80940729140934472638378697587316127928720360069544547090957514643480750354658 109
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 21822582 PS + 30) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4200_1.cur_cp) is an illegal value.
UVM_FATAL @ 21822582 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 21822582 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_sw_no_acc 86725148537779464331193294771525668989360249292707037437553712464870212206193 109
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 16591129 PS + 29) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4200_1.cur_cp) is an illegal value.
UVM_FATAL @ 16591129 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 16591129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_insn_cnt_if.sv,21): Assertion InsnCntMatches_A has failed
otbn_sw_errs_fatal_chk 5851688701673337200520377840720149965713498620475532603728578618245519198297 117
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 9734397 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 9734397 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 9734397 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 9734397 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---