| V1 |
|
90.91% |
| V2 |
|
73.68% |
| V2S |
|
45.16% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| otbn_smoke | 9.000s | 0.000us | 1 | 1 | 100.00 | |
| single_binary | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| otbn_csr_bit_bash | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| otbn_csr_aliasing | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| otbn_csr_mem_rw_with_rand_reset | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| otbn_mem_walk | 80.000s | 0.000us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| otbn_mem_partial_access | 19.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reset_recovery | 0 | 1 | 0.00 | |||
| otbn_reset | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| multi_error | 1 | 1 | 100.00 | |||
| otbn_multi_err | 42.000s | 0.000us | 1 | 1 | 100.00 | |
| back_to_back | 0 | 1 | 0.00 | |||
| otbn_multi | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| otbn_stress_all | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| lc_escalation | 1 | 1 | 100.00 | |||
| otbn_escalate | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| zero_state_err_urnd | 0 | 1 | 0.00 | |||
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sw_errs_fatal_chk | 0 | 1 | 0.00 | |||
| otbn_sw_errs_fatal_chk | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| otbn_alert_test | 3.000s | 0.000us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| otbn_intr_test | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| mem_integrity | 0 | 2 | 0.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| internal_integrity | 0 | 4 | 0.00 | |||
| otbn_alu_bignum_mod_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_controller_ispr_rdata_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_mac_bignum_acc_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_urnd_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| illegal_bus_access | 1 | 1 | 100.00 | |||
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_mem_gnt_acc_err | 0 | 1 | 0.00 | |||
| otbn_mem_gnt_acc_err | 39.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_non_sec_partial_wipe | 0 | 1 | 0.00 | |||
| otbn_partial_wipe | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| otbn_tl_intg_err | 15.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| passthru_mem_tl_intg_err | 1 | 1 | 100.00 | |||
| otbn_passthru_mem_tl_intg_err | 35.000s | 0.000us | 1 | 1 | 100.00 | |
| prim_fsm_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| prim_count_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_mem_scramble | 1 | 1 | 100.00 | |||
| otbn_smoke | 9.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_instruction_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| otbn_tl_intg_err | 15.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_local_esc | 2 | 5 | 40.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_scramble_key_sideload | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_scramble_ctrl_fsm_local_esc | 2 | 5 | 40.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_local_esc | 2 | 5 | 40.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sca | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_redun | 1 | 1 | 100.00 | |||
| otbn_ctrl_redun | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_pc_ctrl_flow_redun | 1 | 1 | 100.00 | |||
| otbn_pc_ctrl_flow_redun | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rnd_bus_consistency | 0 | 1 | 0.00 | |||
| otbn_rnd_sec_cm | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rnd_rng_digest | 0 | 1 | 0.00 | |||
| otbn_rnd_sec_cm | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rf_base_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_base_intg_err | 7.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_stack_wr_ptr_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_integrity | 0 | 1 | 0.00 | |||
| otbn_rf_bignum_intg_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rf_bignum_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_addr_integrity | 0 | 1 | 0.00 | |||
| otbn_stack_addr_integ_chk | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_call_stack_addr_integrity | 0 | 1 | 0.00 | |||
| otbn_stack_addr_integ_chk | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_start_stop_ctrl_state_consistency | 1 | 1 | 100.00 | |||
| otbn_sec_wipe_err | 7.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_instruction_mem_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_reg_sw_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_write_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_multi | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_flow_count | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_flow_sca | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_mem_sw_noaccess | 0 | 1 | 0.00 | |||
| otbn_sw_no_acc | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_key_sideload | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_tlul_fifo_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 97.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| otbn_stress_all_with_rand_reset | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@*_*.cur_cp) is an illegal value. | ||||
| otbn_single | 34193439424538874479109761552636737789458952685451090580508841239793275488355 | 117 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 50337398 PS + 23) Sampled value (27705693518851633) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 50337398 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn1'
UVM_INFO @ 50337398 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_multi | 54946295770511988599857764969302240364851968206094796644100409242801338789494 | 151 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 38671395 PS + 38) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 38671395 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 38671395 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_dmem_err | 63254762748878596703044104537750008052638396121465601071708662275342690512957 | 110 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 8008865 PS + 39) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 8008865 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 8008865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_alu_bignum_mod_err | 3603532844081070298037883045664472163738093696007125434527061930714366475682 | 109 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4558903 PS + 23) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 4558903 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 4558903 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_controller_ispr_rdata_err | 14641634882757566178343083458978037098655100496874525031521865575047898454712 | 119 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 10247116 PS + 25) Sampled value (7092657536580613741) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 10247116 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subvm'
UVM_INFO @ 10247116 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_rf_bignum_intg_err | 18461838627524309964433432724458978811454755947408869781508717155415944019618 | 115 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 9061941 PS + 41) Sampled value (7092657536580613741) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 9061941 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subvm'
UVM_INFO @ 9061941 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_stress_all | 102507301761600480980768205727080719854833787697867514828770860911241348037333 | 151 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 10439916 PS + 26) Sampled value (27705693518851634) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 10439916 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn2'
UVM_INFO @ 10439916 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_stress_all_with_rand_reset | 81598616235208191463773193472765104011521888322147050359056384167571635275004 | 151 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 17952636 PS + 23) Sampled value (27705693450625899) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4207_1.cur_cp) is an illegal value.
UVM_FATAL @ 17952636 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.pack'
UVM_INFO @ 17952636 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_zero_state_err_urnd | 49071924231556390488728056884549210105054240329490459724273447939642047736653 | 111 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4895294 PS + 32) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 4895294 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 4895294 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_sw_errs_fatal_chk | 23963021594995304647486666141656940011009665193052918587196772509047256648201 | 113 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 9813077 PS + 25) Sampled value (7092657536580613741) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 9813077 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subvm'
UVM_INFO @ 9813077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_rnd_sec_cm | 110921620487175753542171587297013783966893781574680550252709921966801941980195 | 112 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 58264248 PS + 33) Sampled value (27705693450625899) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 58264248 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.pack'
UVM_INFO @ 58264248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_sw_no_acc | 84951878794601994523976352347765505240242421487797372456274189181175529273010 | 110 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4759290 PS + 41) Sampled value (27705693518851634) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 4759290 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn2'
UVM_INFO @ 4759290 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_stack_addr_integ_chk | 33401085747454650440178146535378693254689680041049456422742357027985668713951 | 111 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 11906574 PS + 23) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4204_1.cur_cp) is an illegal value.
UVM_FATAL @ 11906574 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 11906574 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_*/otbn_model_if.sv,152): Assertion NoModelErrs has failed | ||||
| otbn_reset | 83406194846208588593067571059609268527032324842159091293862854267288302322309 | 130 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 5226697 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 5226697 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 5226697 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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|
| otbn_imem_err | 48161468033349055297946796049881086058672387965069437482049669982532091202374 | 118 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 5091324 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 5091324 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 5091324 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_mac_bignum_acc_err | 91759419929247072690973364738668355491840163403442155243611077060705610069825 | 120 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 18718698 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 18718698 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 18718698 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_urnd_err | 8789896431095562545991844773649403731879020835086074343747279264634282208179 | 114 |
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 18292585 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 18292585 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 18292585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (otbn_mem_gnt_acc_err_vseq.sv:41) [otbn_mem_gnt_acc_err_vseq] timeout occurred! | ||||
| otbn_mem_gnt_acc_err | 13511423753657551451439498341982038888650559350880643609079738394487250612745 | 112 |
UVM_FATAL @ 10003141982 ps: (otbn_mem_gnt_acc_err_vseq.sv:41) [uvm_test_top.env.virtual_sequencer.otbn_mem_gnt_acc_err_vseq] timeout occurred!
UVM_INFO @ 10003141982 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (otbn_scoreboard.sv:321) [scoreboard] Check failed item.d_data == exp_read_data.val (* [*] vs * [*]) value for register otbn_reg_block.status | ||||
| otbn_partial_wipe | 40730389497896143641384759496385887053999440460612743679864199353261309485648 | 114 |
UVM_ERROR @ 14537889 ps: (otbn_scoreboard.sv:321) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_read_data.val (1 [0x1] vs 255 [0xff]) value for register otbn_reg_block.status
UVM_INFO @ 14537889 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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