| V1 |
|
90.91% |
| V2 |
|
84.21% |
| V2S |
|
61.29% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| otbn_smoke | 10.000s | 0.000us | 1 | 1 | 100.00 | |
| single_binary | 0 | 1 | 0.00 | |||
| otbn_single | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| otbn_csr_hw_reset | 3.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| otbn_csr_bit_bash | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| otbn_csr_aliasing | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| otbn_csr_mem_rw_with_rand_reset | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| otbn_mem_walk | 30.000s | 0.000us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| otbn_mem_partial_access | 46.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reset_recovery | 0 | 1 | 0.00 | |||
| otbn_reset | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| multi_error | 1 | 1 | 100.00 | |||
| otbn_multi_err | 44.000s | 0.000us | 1 | 1 | 100.00 | |
| back_to_back | 0 | 1 | 0.00 | |||
| otbn_multi | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| otbn_stress_all | 11.000s | 0.000us | 0 | 1 | 0.00 | |
| lc_escalation | 1 | 1 | 100.00 | |||
| otbn_escalate | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| zero_state_err_urnd | 1 | 1 | 100.00 | |||
| otbn_zero_state_err_urnd | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| sw_errs_fatal_chk | 1 | 1 | 100.00 | |||
| otbn_sw_errs_fatal_chk | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| otbn_alert_test | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| otbn_intr_test | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 3.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 3.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| mem_integrity | 0 | 2 | 0.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| internal_integrity | 2 | 4 | 50.00 | |||
| otbn_alu_bignum_mod_err | 7.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_controller_ispr_rdata_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_mac_bignum_acc_err | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_urnd_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| illegal_bus_access | 1 | 1 | 100.00 | |||
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_mem_gnt_acc_err | 1 | 1 | 100.00 | |||
| otbn_mem_gnt_acc_err | 10.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_non_sec_partial_wipe | 1 | 1 | 100.00 | |||
| otbn_partial_wipe | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| otbn_tl_intg_err | 16.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| passthru_mem_tl_intg_err | 1 | 1 | 100.00 | |||
| otbn_passthru_mem_tl_intg_err | 48.000s | 0.000us | 1 | 1 | 100.00 | |
| prim_fsm_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| prim_count_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_mem_scramble | 1 | 1 | 100.00 | |||
| otbn_smoke | 10.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_instruction_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| otbn_tl_intg_err | 16.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_local_esc | 3 | 5 | 60.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_scramble_key_sideload | 0 | 1 | 0.00 | |||
| otbn_single | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_scramble_ctrl_fsm_local_esc | 3 | 5 | 60.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_local_esc | 3 | 5 | 60.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sca | 0 | 1 | 0.00 | |||
| otbn_single | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_redun | 1 | 1 | 100.00 | |||
| otbn_ctrl_redun | 7.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_pc_ctrl_flow_redun | 1 | 1 | 100.00 | |||
| otbn_pc_ctrl_flow_redun | 7.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rnd_bus_consistency | 0 | 1 | 0.00 | |||
| otbn_rnd_sec_cm | 8.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rnd_rng_digest | 0 | 1 | 0.00 | |||
| otbn_rnd_sec_cm | 8.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rf_base_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_base_intg_err | 7.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_stack_wr_ptr_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_bignum_intg_err | 14.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_addr_integrity | 1 | 1 | 100.00 | |||
| otbn_stack_addr_integ_chk | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_call_stack_addr_integrity | 1 | 1 | 100.00 | |||
| otbn_stack_addr_integ_chk | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_state_consistency | 1 | 1 | 100.00 | |||
| otbn_sec_wipe_err | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_instruction_mem_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_reg_sw_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_write_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_multi | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_flow_count | 0 | 1 | 0.00 | |||
| otbn_single | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_flow_sca | 0 | 1 | 0.00 | |||
| otbn_single | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_mem_sw_noaccess | 0 | 1 | 0.00 | |||
| otbn_sw_no_acc | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_key_sideload | 0 | 1 | 0.00 | |||
| otbn_single | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_tlul_fifo_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 226.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| otbn_stress_all_with_rand_reset | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@*_*.cur_cp) is an illegal value. | ||||
| otbn_single | 71861912594234186907589501011046510529537201452506487449847068227396062190708 | 119 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 19504786 PS + 32) Sampled value (27705693518851634) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 19504786 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn2'
UVM_INFO @ 19504786 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_multi | 44352001751601315603744044288613039851648040532974461110890614889853288607249 | 147 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 16936432 PS + 29) Sampled value (27705693518851633) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 16936432 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn1'
UVM_INFO @ 16936432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_reset | 99370383605701466820939767872038775736105269109887250234204477704346488950575 | 111 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4019458 PS + 23) Sampled value (27705693518851633) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 4019458 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn1'
UVM_INFO @ 4019458 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_imem_err | 69407983750933255731271671134379814989396303707040968120899229962847597670946 | 112 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 5522534 PS + 32) Sampled value (7092657510811465324) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 5522534 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvl'
UVM_INFO @ 5522534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_dmem_err | 97513941087249069488386110006427736776797236398584047191786340996063362127564 | 112 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4686298 PS + 29) Sampled value (7092657458986120813) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 4686298 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addvm'
UVM_INFO @ 4686298 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_controller_ispr_rdata_err | 20346828904570517273215159954245421177134963735129834931322368896142939573377 | 110 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4247227 PS + 41) Sampled value (27705693518851633) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 4247227 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn1'
UVM_INFO @ 4247227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_stress_all | 9232361454588438567709392996791672575080435339482036945211307995529566064932 | 156 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 35823333 PS + 25) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4206_1.cur_cp) is an illegal value.
UVM_FATAL @ 35823333 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 35823333 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_stress_all_with_rand_reset | 101268151572266593435682858136507331891249272938374016168157192975742237640340 | 148 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 31758667 PS + 25) Sampled value (27705693401607286) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4208_1.cur_cp) is an illegal value.
UVM_FATAL @ 31758667 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulv'
UVM_INFO @ 31758667 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_rnd_sec_cm | 48414692797120588139040241045137127744601573747176579547931905362026555366220 | 113 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 17934339 PS + 29) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 17934339 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 17934339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_urnd_err | 3884652447080879816929429390005075296153920446942786647283398708621108489371 | 107 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 17724959 PS + 25) Sampled value (27705693450625899) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 17724959 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.pack'
UVM_INFO @ 17724959 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_sw_no_acc | 74860365670043872615082448646596509167981307325238882673009097120565148688752 | 106 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 26206819 PS + 29) Sampled value (1815720322767735123308) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 26206819 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvml'
UVM_INFO @ 26206819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|