Simulation Results: kmac/masked

 
18/03/2026 16:32:16 DVSim: v1.16.0 sha: 1b83ebf json Branch: master Tool: vcs [unknown]
Validation stages
V1
100.00%
V2
70.59%
V2S
90.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 11.750s 0.000us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.860s 0.000us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.910s 0.000us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 9.740s 0.000us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.160s 0.000us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.720s 0.000us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.910s 0.000us 1 1 100.00
kmac_csr_aliasing 3.160s 0.000us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.640s 0.000us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 0.900s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 9.650s 0.000us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 709.580s 0.000us 1 1 100.00
test_vectors 6 8 75.00
kmac_test_vectors_sha3_224 29.430s 0.000us 1 1 100.00
kmac_test_vectors_sha3_256 28.080s 0.000us 1 1 100.00
kmac_test_vectors_sha3_384 34.478s 0.000us 0 1 0.00
kmac_test_vectors_sha3_512 13.720s 0.000us 1 1 100.00
kmac_test_vectors_shake_128 103.050s 0.000us 1 1 100.00
kmac_test_vectors_shake_256 1646.000s 0.000us 1 1 100.00
kmac_test_vectors_kmac 2.190s 0.000us 1 1 100.00
kmac_test_vectors_kmac_xof 36.236s 0.000us 0 1 0.00
sideload 1 1 100.00
kmac_sideload 248.590s 0.000us 1 1 100.00
app 1 1 100.00
kmac_app 200.900s 0.000us 1 1 100.00
app_with_partial_data 1 1 100.00
kmac_app_with_partial_data 15.930s 0.000us 1 1 100.00
entropy_refresh 1 1 100.00
kmac_entropy_refresh 83.840s 0.000us 1 1 100.00
error 1 1 100.00
kmac_error 138.070s 0.000us 1 1 100.00
key_error 0 1 0.00
kmac_key_error 34.200s 0.000us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 36.248s 0.000us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 0.920s 0.000us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.720s 0.000us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 11.881s 0.000us 0 1 0.00
lc_escalation 0 1 0.00
kmac_lc_escalation 38.069s 0.000us 0 1 0.00
stress_all 1 1 100.00
kmac_stress_all 722.620s 0.000us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.690s 0.000us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.700s 0.000us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
kmac_tl_errors 0.000s 0.000us 0 1 0.00
tl_d_illegal_access 0 1 0.00
kmac_tl_errors 0.000s 0.000us 0 1 0.00
tl_d_outstanding_access 3 4 75.00
kmac_csr_hw_reset 0.860s 0.000us 1 1 100.00
kmac_csr_rw 0.910s 0.000us 1 1 100.00
kmac_csr_aliasing 3.160s 0.000us 1 1 100.00
kmac_same_csr_outstanding 90.785s 0.000us 0 1 0.00
tl_d_partial_access 3 4 75.00
kmac_csr_hw_reset 0.860s 0.000us 1 1 100.00
kmac_csr_rw 0.910s 0.000us 1 1 100.00
kmac_csr_aliasing 3.160s 0.000us 1 1 100.00
kmac_same_csr_outstanding 90.785s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.460s 0.000us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.460s 0.000us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.460s 0.000us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.460s 0.000us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.080s 0.000us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_tl_intg_err 1.910s 0.000us 1 1 100.00
kmac_sec_cm 28.850s 0.000us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 1.910s 0.000us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 0 1 0.00
kmac_lc_escalation 38.069s 0.000us 0 1 0.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 11.750s 0.000us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 248.590s 0.000us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.460s 0.000us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 28.850s 0.000us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 28.850s 0.000us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 28.850s 0.000us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 11.750s 0.000us 1 1 100.00
sec_cm_fsm_global_esc 0 1 0.00
kmac_lc_escalation 38.069s 0.000us 0 1 0.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 28.850s 0.000us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 1 1 100.00
kmac_mubi 112.760s 0.000us 1 1 100.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 11.750s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 37.020s 0.000us 1 1 100.00

Error Messages

   Test seed line log context
Job timed out after * minutes
kmac_tl_errors 34426083374423393910800836248184973158270716424756662306623337555734614218186 None
Job timed out after 60 minutes
Job returned non-zero exit code
kmac_same_csr_outstanding 60860608990597213288819552253212761201488291662865031461090628337570360059715 None
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 18 16:36 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
kmac_sideload_invalid 14095293122757182222355183992348368135196298383059607214427355395639787840198 None
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 18 16:38 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
kmac_test_vectors_sha3_384 83678667490888836010817028177426834945855680889915103896781789674991102208170 None
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 18 16:38 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
kmac_test_vectors_kmac_xof 97155686961635383239173151703339348637923162734699079338905296512562289062506 None
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 18 16:38 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
kmac_key_error 15446949148268073886047605614788531769017521253520914263401763321350254118104 None
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 18 16:38 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
kmac_entropy_ready_error 37922416532178146539450330171293270356204029630565036251523542527879074437731 None
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 18 16:38 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
kmac_lc_escalation 106152806704003864663808792954263527099313028318495274505183236037194233644163 None
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 18 16:38 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
kmac None None
LCA features enabled by '-lca' argument on the command line. For more
information regarding list of LCA features please refer to Chapter "LCA
features" in the VCS Release Notes
Warning-[SPECIAL_LICENSE_NEEDED] Needs special license
-elfile needs special license feature VCSTools_Net
Please check if your license server has feature VCSTools_Net available
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:115: cov_report] Error 1