Simulation Results: prim_esc

 
18/03/2026 16:32:16 DVSim: v1.16.0 sha: 1b83ebf json Branch: master Tool: vcs [unknown]
Validation stages
V1
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
prim_esc_request_test 1 1 100.00
prim_esc_test 0.510s 0.000us 1 1 100.00
prim_ping_req_interrupted_by_esc_req_test 1 1 100.00
prim_esc_test 0.510s 0.000us 1 1 100.00
prim_esc_tx_integrity_errors_test 1 1 100.00
prim_esc_test 0.510s 0.000us 1 1 100.00
prim_esc_reverse_ping_timeout_test 1 1 100.00
prim_esc_test 0.510s 0.000us 1 1 100.00
prim_esc_receiver_counter_fail_test 1 1 100.00
prim_esc_test 0.510s 0.000us 1 1 100.00
prim_esc_handshake_with_rand_reset_test 1 1 100.00
prim_esc_test 0.510s 0.000us 1 1 100.00

Error Messages

   Test seed line log context
Job returned non-zero exit code
prim_esc None None
Inclusivity and Diversity" (Refer to article 000036315 at
https://solvnetplus.synopsys.com)
Error-[URG-NLCW] No license key
URG failed to get a license key. Number of attempts to get a license key
exceeded the limit (500).
Please check for 'VCSTools_Net' or 'VT_CoverageURG' key in your license
file.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:115: cov_report] Error 1