| V1 |
|
10.00% |
| V2 |
|
20.00% |
| V2S |
|
33.33% |
| V3 |
|
83.33% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| aon_timer_smoke | 1.290s | 0.000us | 1 | 1 | 100.00 | |
| csr_hw_reset | 0 | 1 | 0.00 | |||
| aon_timer_csr_hw_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_rw | 0 | 1 | 0.00 | |||
| aon_timer_csr_rw | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_bit_bash | 0 | 1 | 0.00 | |||
| aon_timer_csr_bit_bash | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_aliasing | 0 | 1 | 0.00 | |||
| aon_timer_csr_aliasing | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_mem_rw_with_rand_reset | 0 | 1 | 0.00 | |||
| aon_timer_csr_mem_rw_with_rand_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| regwen_csr_and_corresponding_lockable_csr | 0 | 2 | 0.00 | |||
| aon_timer_csr_rw | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| aon_timer_csr_aliasing | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| mem_walk | 0 | 1 | 0.00 | |||
| aon_timer_mem_walk | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| mem_partial_access | 0 | 1 | 0.00 | |||
| aon_timer_mem_partial_access | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| prescaler | 1 | 1 | 100.00 | |||
| aon_timer_prescaler | 2.020s | 0.000us | 1 | 1 | 100.00 | |
| jump | 1 | 1 | 100.00 | |||
| aon_timer_jump | 0.950s | 0.000us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| aon_timer_stress_all | 6.300s | 0.000us | 1 | 1 | 100.00 | |
| alert_test | 0 | 1 | 0.00 | |||
| aon_timer_alert_test | 11.911s | 0.000us | 0 | 1 | 0.00 | |
| intr_test | 0 | 1 | 0.00 | |||
| aon_timer_intr_test | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_oob_addr_access | 0 | 1 | 0.00 | |||
| aon_timer_tl_errors | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_illegal_access | 0 | 1 | 0.00 | |||
| aon_timer_tl_errors | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_outstanding_access | 0 | 4 | 0.00 | |||
| aon_timer_csr_hw_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| aon_timer_csr_rw | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| aon_timer_csr_aliasing | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| aon_timer_same_csr_outstanding | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_partial_access | 0 | 4 | 0.00 | |||
| aon_timer_csr_hw_reset | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| aon_timer_csr_rw | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| aon_timer_csr_aliasing | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| aon_timer_same_csr_outstanding | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 1 | 2 | 50.00 | |||
| aon_timer_sec_cm | 1.390s | 0.000us | 1 | 1 | 100.00 | |
| aon_timer_tl_intg_err | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_bus_integrity | 0 | 1 | 0.00 | |||
| aon_timer_tl_intg_err | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| max_threshold | 1 | 1 | 100.00 | |||
| aon_timer_smoke_max_thold | 0.670s | 0.000us | 1 | 1 | 100.00 | |
| min_threshold | 0 | 1 | 0.00 | |||
| aon_timer_smoke_min_thold | 36.176s | 0.000us | 0 | 1 | 0.00 | |
| wkup_count_hi_cdc | 1 | 1 | 100.00 | |||
| aon_timer_wkup_count_cdc_hi | 2.260s | 0.000us | 1 | 1 | 100.00 | |
| custom_intr | 1 | 1 | 100.00 | |||
| aon_timer_custom_intr | 1.150s | 0.000us | 1 | 1 | 100.00 | |
| alternating_on_off | 1 | 1 | 100.00 | |||
| aon_timer_alternating_enable_on_off | 2.910s | 0.000us | 1 | 1 | 100.00 | |
| stress_all_with_rand_reset | 1 | 1 | 100.00 | |||
| aon_timer_stress_all_with_rand_reset | 9.170s | 0.000us | 1 | 1 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job timed out after * minutes | ||||
| cover_reg_top | None | None |
Job timed out after 60 minutes
|
|
| Job returned non-zero exit code | ||||
| aon_timer_smoke_min_thold | 49806409128717139308035485523441635486778979682900357364457633585357853810799 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:19 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| aon_timer_alert_test | 102577208127073930053954100926138775324850371848121692493460743061002733483870 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:19 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| aon_timer | None | None |
LCA features enabled by '-lca' argument on the command line. For more
information regarding list of LCA features please refer to Chapter "LCA
features" in the VCS Release Notes
Warning-[SPECIAL_LICENSE_NEEDED] Needs special license
-merge_across_libs needs special license feature VCSTools_Net
Please check if your license server has feature VCSTools_Net available
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:110: cov_merge] Error 1
|
|
| Job killed most likely because its dependent job failed. | ||||
| aon_timer_tl_errors | 101999538157367206683772806858905632762553791441733060679975154772099640105224 | None | ||
| aon_timer_tl_intg_err | 36363595414546316302691608850165206337980286427042454314543887922027951258474 | None | ||
| aon_timer_intr_test | 26022008038356173670218455748611326689548830377220177218426089591039421759809 | None | ||
| aon_timer_mem_walk | 91599503597355964396144483556097548698615193661293086102897020854371847646793 | None | ||
| aon_timer_mem_partial_access | 61154605616193211440910090301361334963868723409170901751814701428762450733993 | None | ||
| aon_timer_csr_hw_reset | 63164495593364635324355747059538112159367715652120431439603259236322928237450 | None | ||
| aon_timer_csr_rw | 54640184132360934197643219490693790808550505497600656973077815175833095183034 | None | ||
| aon_timer_csr_bit_bash | 5179427486053744729163370172421117507435463142608544704311941000948543633007 | None | ||
| aon_timer_csr_aliasing | 80513446222240549704969364331457455115885527759763306571640790501352910715766 | None | ||
| aon_timer_same_csr_outstanding | 39235183291188677488850475387770096017026430698636728417465809552011973002717 | None | ||
| aon_timer_csr_mem_rw_with_rand_reset | 111685061050331479038168065652378226599071227159823909490390669743092840431928 | None | ||
| aon_timer | None | None | ||