Simulation Results

Simulation Results: gpio

19/03/2026 16:03:37 DVSim: v1.16.0 sha: 1b83ebf json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
90.54 %

code
74.80 %

assert
96.84 %

func
99.99 %

line
92.70 %

branch
89.03 %

cond
89.06 %

toggle
93.85 %

FSM
9.38 %

Validation stages

V1		90.91%
V2		81.82%
V2S		100.00%
V3		0.00%
unmapped		100.00%

10/11 passed

90.91 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				3	4	75.00
	gpio_smoke	0.780s	0.000us	1	1	100.00
	gpio_smoke_no_pullup_pulldown	32.396s	0.000us	0	1	0.00
	gpio_smoke_en_cdc_prim	0.970s	0.000us	1	1	100.00
	gpio_smoke_no_pullup_pulldown_en_cdc_prim	0.780s	0.000us	1	1	100.00
csr_hw_reset				1	1	100.00
	gpio_csr_hw_reset	0.650s	0.000us	1	1	100.00
csr_rw				1	1	100.00
	gpio_csr_rw	0.640s	0.000us	1	1	100.00
csr_bit_bash				1	1	100.00
	gpio_csr_bit_bash	4.870s	0.000us	1	1	100.00
csr_aliasing				1	1	100.00
	gpio_csr_aliasing	0.940s	0.000us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	gpio_csr_mem_rw_with_rand_reset	0.630s	0.000us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	gpio_csr_rw	0.640s	0.000us	1	1	100.00
	gpio_csr_aliasing	0.940s	0.000us	1	1	100.00

18/22 passed

81.82 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
direct_and_masked_out				2	2	100.00
	gpio_random_dout_din	0.740s	0.000us	1	1	100.00
	gpio_random_dout_din_no_pullup_pulldown	0.960s	0.000us	1	1	100.00
out_in_regs_read_write				1	1	100.00
	gpio_dout_din_regs_random_rw	0.710s	0.000us	1	1	100.00
gpio_interrupt_programming				1	1	100.00
	gpio_intr_rand_pgm	0.800s	0.000us	1	1	100.00
random_interrupt_trigger				1	1	100.00
	gpio_rand_intr_trigger	2.190s	0.000us	1	1	100.00
interrupt_and_noise_filter				1	1	100.00
	gpio_intr_with_filter_rand_intr_event	1.510s	0.000us	1	1	100.00
noise_filter_stress				0	1	0.00
	gpio_filter_stress	36.200s	0.000us	0	1	0.00
regs_long_reads_and_writes				1	1	100.00
	gpio_random_long_reg_writes_reg_reads	2.970s	0.000us	1	1	100.00
full_random				1	1	100.00
	gpio_full_random	0.590s	0.000us	1	1	100.00
stress_all				1	1	100.00
	gpio_stress_all	16.470s	0.000us	1	1	100.00
alert_test				0	1	0.00
	gpio_alert_test	34.350s	0.000us	0	1	0.00
intr_test				1	1	100.00
	gpio_intr_test	0.520s	0.000us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	gpio_tl_errors	1.170s	0.000us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	gpio_tl_errors	1.170s	0.000us	1	1	100.00
tl_d_outstanding_access				3	4	75.00
	gpio_csr_rw	0.640s	0.000us	1	1	100.00
	gpio_same_csr_outstanding	62.410s	0.000us	0	1	0.00
	gpio_csr_aliasing	0.940s	0.000us	1	1	100.00
	gpio_csr_hw_reset	0.650s	0.000us	1	1	100.00
tl_d_partial_access				3	4	75.00
	gpio_csr_rw	0.640s	0.000us	1	1	100.00
	gpio_same_csr_outstanding	62.410s	0.000us	0	1	0.00
	gpio_csr_aliasing	0.940s	0.000us	1	1	100.00
	gpio_csr_hw_reset	0.650s	0.000us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	gpio_sec_cm	0.750s	0.000us	1	1	100.00
	gpio_tl_intg_err	1.060s	0.000us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	gpio_tl_intg_err	1.060s	0.000us	1	1	100.00

0/2 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Total
straps_data				1
	gpio_rand_straps	39.998s	0.000us	1
stress_all_with_rand_reset				1
	gpio_stress_all_with_rand_reset	18.138s	0.000us	1

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	gpio_inp_prd_cnt	0.540s	0.000us	1	1	100.00

Error Messages

	Test	seed	line	log context
Job returned non-zero exit code
	gpio_smoke_no_pullup_pulldown	64225555386728399961854230899431224874799655899923734253433772452535468245504	None	Chronologic VCS simulator copyright 1991-2023 Contains Synopsys proprietary information. Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:06 2026 Feature removed during lmreread, or wrong SERVER line hostid. Check your license file. Please contact VCS Customer Support at 1-800-VERILOG for more information. make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
	gpio_filter_stress	111748157154030062840802305224411198849995215266660730596715278818310023842975	None	Chronologic VCS simulator copyright 1991-2023 Contains Synopsys proprietary information. Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:07 2026 Feature removed during lmreread, or wrong SERVER line hostid. Check your license file. Please contact VCS Customer Support at 1-800-VERILOG for more information. make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
	gpio_stress_all_with_rand_reset	58150748942691231965955011752504980437109998012887800893519678946741910576334	None	Chronologic VCS simulator copyright 1991-2023 Contains Synopsys proprietary information. Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:07 2026 Feature removed during lmreread, or wrong SERVER line hostid. Check your license file. Please contact VCS Customer Support at 1-800-VERILOG for more information. make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
	gpio_rand_straps	33858479838541669491864259109779271359619094910955080800868085083262443263622	None	Chronologic VCS simulator copyright 1991-2023 Contains Synopsys proprietary information. Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:07 2026 Feature removed during lmreread, or wrong SERVER line hostid. Check your license file. Please contact VCS Customer Support at 1-800-VERILOG for more information. make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
	gpio_alert_test	39572007200481347069021390402047906035917595742311667213382607528793344493441	None	Chronologic VCS simulator copyright 1991-2023 Contains Synopsys proprietary information. Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:07 2026 Feature removed during lmreread, or wrong SERVER line hostid. Check your license file. Please contact VCS Customer Support at 1-800-VERILOG for more information. make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
	gpio_same_csr_outstanding	66439883646509245233823304613656806470215273627090103853329746890471336139446	None	Chronologic VCS simulator copyright 1991-2023 Contains Synopsys proprietary information. Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:07 2026 Feature removed during lmreread, or wrong SERVER line hostid. Check your license file. Please contact VCS Customer Support at 1-800-VERILOG for more information. make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255