| V1 |
|
87.50% |
| V2 |
|
75.00% |
| V2S |
|
22.22% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 0 | 1 | 0.00 | |||
| keymgr_dpe_smoke | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| keymgr_dpe_csr_hw_reset | 1.080s | 0.000us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| keymgr_dpe_csr_rw | 0.780s | 0.000us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| keymgr_dpe_csr_bit_bash | 6.070s | 0.000us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| keymgr_dpe_csr_aliasing | 3.820s | 0.000us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| keymgr_dpe_csr_mem_rw_with_rand_reset | 1.220s | 0.000us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| keymgr_dpe_csr_rw | 0.780s | 0.000us | 1 | 1 | 100.00 | |
| keymgr_dpe_csr_aliasing | 3.820s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| intr_test | 1 | 1 | 100.00 | |||
| keymgr_dpe_intr_test | 0.620s | 0.000us | 1 | 1 | 100.00 | |
| alert_test | 0 | 1 | 0.00 | |||
| keymgr_dpe_alert_test | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_oob_addr_access | 0 | 1 | 0.00 | |||
| keymgr_dpe_tl_errors | 35.873s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_illegal_access | 0 | 1 | 0.00 | |||
| keymgr_dpe_tl_errors | 35.873s | 0.000us | 0 | 1 | 0.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| keymgr_dpe_csr_hw_reset | 1.080s | 0.000us | 1 | 1 | 100.00 | |
| keymgr_dpe_csr_rw | 0.780s | 0.000us | 1 | 1 | 100.00 | |
| keymgr_dpe_csr_aliasing | 3.820s | 0.000us | 1 | 1 | 100.00 | |
| keymgr_dpe_same_csr_outstanding | 1.260s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| keymgr_dpe_csr_hw_reset | 1.080s | 0.000us | 1 | 1 | 100.00 | |
| keymgr_dpe_csr_rw | 0.780s | 0.000us | 1 | 1 | 100.00 | |
| keymgr_dpe_csr_aliasing | 3.820s | 0.000us | 1 | 1 | 100.00 | |
| keymgr_dpe_same_csr_outstanding | 1.260s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 1 | 2 | 50.00 | |||
| keymgr_dpe_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| keymgr_dpe_tl_intg_err | 1.780s | 0.000us | 1 | 1 | 100.00 | |
| shadow_reg_update_error | 0 | 1 | 0.00 | |||
| keymgr_dpe_shadow_reg_errors | 58.387s | 0.000us | 0 | 1 | 0.00 | |
| shadow_reg_read_clear_staged_value | 0 | 1 | 0.00 | |||
| keymgr_dpe_shadow_reg_errors | 58.387s | 0.000us | 0 | 1 | 0.00 | |
| shadow_reg_storage_error | 0 | 1 | 0.00 | |||
| keymgr_dpe_shadow_reg_errors | 58.387s | 0.000us | 0 | 1 | 0.00 | |
| shadowed_reset_glitch | 0 | 1 | 0.00 | |||
| keymgr_dpe_shadow_reg_errors | 58.387s | 0.000us | 0 | 1 | 0.00 | |
| shadow_reg_update_error_with_csr_rw | 1 | 1 | 100.00 | |||
| keymgr_dpe_shadow_reg_errors_with_csr_rw | 3.250s | 0.000us | 1 | 1 | 100.00 | |
| prim_count_check | 0 | 1 | 0.00 | |||
| keymgr_dpe_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| prim_fsm_check | 0 | 1 | 0.00 | |||
| keymgr_dpe_sec_cm | 0.000s | 0.000us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job returned non-zero exit code | ||||
| default | None | None |
recompiling module keymgr_dpe_cov_bind
All of 111 modules done
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
CPU time: 24.842 seconds to compile
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:36: do_build] Error 1
|
|
| keymgr_dpe_shadow_reg_errors | 3090774422034707542680583302306296443366504901419540402982696349797042390218 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:17 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| keymgr_dpe_tl_errors | 76262966163734120220150636516383184446045706963532522049696616009745634726823 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:17 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| Job killed most likely because its dependent job failed. | ||||
| keymgr_dpe_smoke | 13444248368007181443717254087539330485965797839849760705897771980235568800591 | None | ||
| keymgr_dpe_sec_cm | 5776969592970465700128024069067280004658828605411374150333152926826678121087 | None | ||
| keymgr_dpe_alert_test | 86315213320095632531140276304520668053107798018664752028631072638792253385998 | None | ||