| V1 |
|
80.00% |
| V2 |
|
88.24% |
| V2S |
|
65.00% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| kmac_smoke | 33.670s | 0.000us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| kmac_csr_hw_reset | 0.860s | 0.000us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| kmac_csr_rw | 0.870s | 0.000us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| kmac_csr_bit_bash | 6.050s | 0.000us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| kmac_csr_aliasing | 2.730s | 0.000us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 0 | 1 | 0.00 | |||
| kmac_csr_mem_rw_with_rand_reset | 38.288s | 0.000us | 0 | 1 | 0.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| kmac_csr_rw | 0.870s | 0.000us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 2.730s | 0.000us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| kmac_mem_walk | 0.650s | 0.000us | 1 | 1 | 100.00 | |
| mem_partial_access | 0 | 1 | 0.00 | |||
| kmac_mem_partial_access | 11.818s | 0.000us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| long_msg_and_output | 1 | 1 | 100.00 | |||
| kmac_long_msg_and_output | 736.220s | 0.000us | 1 | 1 | 100.00 | |
| burst_write | 1 | 1 | 100.00 | |||
| kmac_burst_write | 61.450s | 0.000us | 1 | 1 | 100.00 | |
| test_vectors | 6 | 8 | 75.00 | |||
| kmac_test_vectors_sha3_224 | 1003.170s | 0.000us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_256 | 1253.040s | 0.000us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_384 | 17.160s | 0.000us | 1 | 1 | 100.00 | |
| kmac_test_vectors_sha3_512 | 38.309s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_shake_128 | 1529.840s | 0.000us | 1 | 1 | 100.00 | |
| kmac_test_vectors_shake_256 | 917.800s | 0.000us | 1 | 1 | 100.00 | |
| kmac_test_vectors_kmac | 36.581s | 0.000us | 0 | 1 | 0.00 | |
| kmac_test_vectors_kmac_xof | 1.410s | 0.000us | 1 | 1 | 100.00 | |
| sideload | 0 | 1 | 0.00 | |||
| kmac_sideload | 40.545s | 0.000us | 0 | 1 | 0.00 | |
| app | 1 | 1 | 100.00 | |||
| kmac_app | 135.050s | 0.000us | 1 | 1 | 100.00 | |
| app_with_partial_data | 1 | 1 | 100.00 | |||
| kmac_app_with_partial_data | 92.530s | 0.000us | 1 | 1 | 100.00 | |
| entropy_refresh | 1 | 1 | 100.00 | |||
| kmac_entropy_refresh | 104.420s | 0.000us | 1 | 1 | 100.00 | |
| error | 1 | 1 | 100.00 | |||
| kmac_error | 38.910s | 0.000us | 1 | 1 | 100.00 | |
| key_error | 1 | 1 | 100.00 | |||
| kmac_key_error | 0.950s | 0.000us | 1 | 1 | 100.00 | |
| sideload_invalid | 1 | 1 | 100.00 | |||
| kmac_sideload_invalid | 2.320s | 0.000us | 1 | 1 | 100.00 | |
| edn_timeout_error | 1 | 1 | 100.00 | |||
| kmac_edn_timeout_error | 2.860s | 0.000us | 1 | 1 | 100.00 | |
| entropy_mode_error | 0 | 1 | 0.00 | |||
| kmac_entropy_mode_error | 38.364s | 0.000us | 0 | 1 | 0.00 | |
| entropy_ready_error | 1 | 1 | 100.00 | |||
| kmac_entropy_ready_error | 8.940s | 0.000us | 1 | 1 | 100.00 | |
| lc_escalation | 1 | 1 | 100.00 | |||
| kmac_lc_escalation | 18.400s | 0.000us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| kmac_stress_all | 24.720s | 0.000us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| kmac_intr_test | 0.690s | 0.000us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| kmac_alert_test | 0.690s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 2.150s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| kmac_tl_errors | 2.150s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 0.860s | 0.000us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.870s | 0.000us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 2.730s | 0.000us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.910s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| kmac_csr_hw_reset | 0.860s | 0.000us | 1 | 1 | 100.00 | |
| kmac_csr_rw | 0.870s | 0.000us | 1 | 1 | 100.00 | |
| kmac_csr_aliasing | 2.730s | 0.000us | 1 | 1 | 100.00 | |
| kmac_same_csr_outstanding | 1.910s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 0.000us | 1 | 1 | 100.00 | |
| shadow_reg_read_clear_staged_value | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 0.000us | 1 | 1 | 100.00 | |
| shadow_reg_storage_error | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 0.000us | 1 | 1 | 100.00 | |
| shadowed_reset_glitch | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 0.000us | 1 | 1 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 0 | 1 | 0.00 | |||
| kmac_shadow_reg_errors_with_csr_rw | 14.083s | 0.000us | 0 | 1 | 0.00 | |
| tl_intg_err | 1 | 2 | 50.00 | |||
| kmac_tl_intg_err | 3.360s | 0.000us | 1 | 1 | 100.00 | |
| kmac_sec_cm | 38.319s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| kmac_tl_intg_err | 3.360s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_lc_escalate_en_intersig_mubi | 1 | 1 | 100.00 | |||
| kmac_lc_escalation | 18.400s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_sw_key_key_masking | 1 | 1 | 100.00 | |||
| kmac_smoke | 33.670s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 0 | 1 | 0.00 | |||
| kmac_sideload | 40.545s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_shadow | 1 | 1 | 100.00 | |||
| kmac_shadow_reg_errors | 1.350s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_fsm_sparse | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 38.319s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 38.319s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_packer_ctr_redun | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 38.319s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_cfg_shadowed_config_regwen | 1 | 1 | 100.00 | |||
| kmac_smoke | 33.670s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_fsm_global_esc | 1 | 1 | 100.00 | |||
| kmac_lc_escalation | 18.400s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_fsm_local_esc | 0 | 1 | 0.00 | |||
| kmac_sec_cm | 38.319s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_absorbed_ctrl_mubi | 1 | 1 | 100.00 | |||
| kmac_mubi | 13.600s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_sw_cmd_ctrl_sparse | 1 | 1 | 100.00 | |||
| kmac_smoke | 33.670s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 1 | 1 | 100.00 | |||
| kmac_stress_all_with_rand_reset | 66.210s | 0.000us | 1 | 1 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Job returned non-zero exit code | ||||
| kmac_shadow_reg_errors_with_csr_rw | 17877670961176624029307679249185807595159837777507337782403297513023065658942 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:08 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| kmac_mem_partial_access | 7137504161783315607116858795085659330672113521005045272551390113750030643182 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:08 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| kmac_csr_mem_rw_with_rand_reset | 73093363271160962084506788956055623238629211282641669520003617498481665816342 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:08 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| kmac_sideload | 6487834026128778704310152820940526346187732147801854382708650852549622314586 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:09 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| kmac_test_vectors_sha3_512 | 18824508578438995337579778252905383782053972418213785910908080360059610552093 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:09 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| kmac_test_vectors_kmac | 43174125731450635660591201271080971914545986322765127192881745215866918027630 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:09 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| kmac_entropy_mode_error | 103861075667430197001080313772415775658002690980438306021479838363220527344094 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:10 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| kmac_sec_cm | 76855349006781247867379243062067887599401283864070266102789331732787361423875 | None |
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Mar 19 16:10 2026
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 255
|
|
| kmac | None | None |
LCA features enabled by '-lca' argument on the command line. For more
information regarding list of LCA features please refer to Chapter "LCA
features" in the VCS Release Notes
Warning-[SPECIAL_LICENSE_NEEDED] Needs special license
-elfile needs special license feature VCSTools_Net
Please check if your license server has feature VCSTools_Net available
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:115: cov_report] Error 1
|
|