Simulation Results: aes/unmasked

 
30/03/2026 16:01:39 DVSim: v1.17.3 sha: 8ba5f75 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 86.34 %
  • code
  • 91.95 %
  • assert
  • 97.94 %
  • func
  • 69.14 %
  • block
  • 91.72 %
  • line
  • 93.34 %
  • branch
  • 84.98 %
  • toggle
  • 97.99 %
  • FSM
  • 91.49 %
Validation stages
V1
100.00%
V2
94.74%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 1.000s 69.880us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 86.915us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 1.000s 84.557us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 65.453us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 5.000s 518.354us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 4.000s 940.532us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 128.310us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 65.453us 1 1 100.00
aes_csr_aliasing 4.000s 940.532us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 86.915us 1 1 100.00
aes_config_error 2.000s 87.422us 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 86.915us 1 1 100.00
aes_config_error 2.000s 87.422us 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
back2back 2 2 100.00
aes_stress 1.000s 108.285us 1 1 100.00
aes_b2b 3.000s 157.116us 1 1 100.00
backpressure 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 86.915us 1 1 100.00
aes_config_error 2.000s 87.422us 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
aes_alert_reset 3.000s 332.868us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 3.000s 77.330us 1 1 100.00
aes_config_error 2.000s 87.422us 1 1 100.00
aes_alert_reset 3.000s 332.868us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 3.000s 162.848us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 4.000s 310.506us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 3.000s 874.264us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 3.000s 332.868us 1 1 100.00
stress 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
sideload 2 2 100.00
aes_stress 1.000s 108.285us 1 1 100.00
aes_sideload 3.000s 234.330us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 2.000s 76.891us 1 1 100.00
stress_all 0 1 0.00
aes_stress_all 4.000s 112.959us 0 1 0.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 2.000s 79.462us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 191.339us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 108.461us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 108.461us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 1.000s 84.557us 1 1 100.00
aes_csr_rw 2.000s 65.453us 1 1 100.00
aes_csr_aliasing 4.000s 940.532us 1 1 100.00
aes_same_csr_outstanding 2.000s 90.877us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 1.000s 84.557us 1 1 100.00
aes_csr_rw 2.000s 65.453us 1 1 100.00
aes_csr_aliasing 4.000s 940.532us 1 1 100.00
aes_same_csr_outstanding 2.000s 90.877us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 3.000s 65.896us 1 1 100.00
fault_inject 3 3 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_control_fi 2.000s 111.102us 1 1 100.00
aes_cipher_fi 1.000s 48.142us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 85.857us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 85.857us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 85.857us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 85.857us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 2023.099us 1 1 100.00
tl_intg_err 2 2 100.00
aes_tl_intg_err 2.000s 148.369us 1 1 100.00
aes_sec_cm 3.000s 1181.726us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 148.369us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 3.000s 332.868us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 85.857us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 85.857us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 3.000s 86.915us 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
aes_alert_reset 3.000s 332.868us 1 1 100.00
aes_core_fi 2.000s 78.018us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 2.000s 79.462us 1 1 100.00
aes_config_error 2.000s 87.422us 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
aes_core_fi 2.000s 78.018us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 85.857us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 81.425us 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 1.000s 108.285us 1 1 100.00
aes_sideload 3.000s 234.330us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 81.425us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 81.425us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 81.425us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 81.425us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 81.425us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 1.000s 108.285us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 2.000s 80.240us 1 1 100.00
sec_cm_main_fsm_redun 4 4 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_control_fi 2.000s 111.102us 1 1 100.00
aes_cipher_fi 1.000s 48.142us 1 1 100.00
aes_ctr_fi 2.000s 98.924us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 2.000s 80.240us 1 1 100.00
sec_cm_cipher_fsm_redun 3 3 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_control_fi 2.000s 111.102us 1 1 100.00
aes_cipher_fi 1.000s 48.142us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 1.000s 48.142us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 2.000s 80.240us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_control_fi 2.000s 111.102us 1 1 100.00
aes_ctr_fi 2.000s 98.924us 1 1 100.00
sec_cm_ghash_fsm_sparse 1 1 100.00
aes_fi 2.000s 80.240us 1 1 100.00
sec_cm_ctrl_sparse 4 4 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_control_fi 2.000s 111.102us 1 1 100.00
aes_cipher_fi 1.000s 48.142us 1 1 100.00
aes_ctr_fi 2.000s 98.924us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 3.000s 332.868us 1 1 100.00
sec_cm_main_fsm_local_esc 4 4 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_control_fi 2.000s 111.102us 1 1 100.00
aes_cipher_fi 1.000s 48.142us 1 1 100.00
aes_ctr_fi 2.000s 98.924us 1 1 100.00
sec_cm_cipher_fsm_local_esc 4 4 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_control_fi 2.000s 111.102us 1 1 100.00
aes_cipher_fi 1.000s 48.142us 1 1 100.00
aes_ctr_fi 2.000s 98.924us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_control_fi 2.000s 111.102us 1 1 100.00
aes_ctr_fi 2.000s 98.924us 1 1 100.00
sec_cm_ghash_fsm_local_esc 2 2 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_ghash_fi 2.000s 54.957us 1 1 100.00
sec_cm_data_reg_local_esc 3 3 100.00
aes_fi 2.000s 80.240us 1 1 100.00
aes_control_fi 2.000s 111.102us 1 1 100.00
aes_cipher_fi 1.000s 48.142us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 2.000s 23.778us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_scoreboard.sv:775) scoreboard [scoreboard] # *
aes_stress_all 45230804883468112163887205568631430915430530757139148211505596828958346045257 8402
UVM_FATAL @ 112959463 ps: (aes_scoreboard.sv:775) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] # 0
TEST FAILED MESSAGES DID NOT MATCH
0 58 aa 00 0
1 00 fe 00 0
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 2857252982301544231259345866273367646544623709680581642180732562356273039065 197
UVM_ERROR @ 23778115 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 23778115 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---