Simulation Results: i2c

 
30/03/2026 16:01:39 DVSim: v1.17.3 sha: 8ba5f75 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.32 %
  • code
  • 81.45 %
  • assert
  • 96.19 %
  • func
  • 78.33 %
  • line
  • 96.38 %
  • branch
  • 92.26 %
  • cond
  • 84.89 %
  • toggle
  • 89.66 %
  • FSM
  • 44.05 %
Validation stages
V1
100.00%
V2
87.80%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 50.280s 6829.717us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 5.750s 543.017us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.780s 18.869us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.900s 27.265us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 3.600s 1599.803us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 1.740s 471.416us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 1.260s 65.968us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.900s 27.265us 1 1 100.00
i2c_csr_aliasing 1.740s 471.416us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 1.090s 48.157us 0 1 0.00
host_stress_all 0 1 0.00
i2c_host_stress_all 64.300s 2941.468us 0 1 0.00
host_maxperf 1 1 100.00
i2c_host_perf 10.900s 5049.978us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.730s 49.858us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 88.570s 9827.062us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 94.950s 2254.174us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 0.740s 271.038us 1 1 100.00
i2c_host_fifo_fmt_empty 4.350s 406.413us 1 1 100.00
i2c_host_fifo_reset_rx 6.380s 366.769us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 51.300s 2734.701us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 7.810s 1203.666us 1 1 100.00
i2c_host_mode_toggle 0 1 0.00
i2c_host_mode_toggle 0.960s 34.333us 0 1 0.00
target_glitch 0 1 0.00
i2c_target_glitch 2.070s 1589.383us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 26.830s 10420.642us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 4.500s 3884.320us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 10.450s 2898.740us 1 1 100.00
i2c_target_intr_smoke 3.840s 821.477us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 0.990s 159.520us 1 1 100.00
i2c_target_fifo_reset_tx 0.760s 551.648us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 36.960s 27608.234us 1 1 100.00
i2c_target_stress_rd 10.450s 2898.740us 1 1 100.00
i2c_target_intr_stress_wr 9.420s 9172.472us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 4.130s 1154.231us 1 1 100.00
target_clock_stretch 1 1 100.00
i2c_target_stretch 3.400s 3981.473us 1 1 100.00
bad_address 1 1 100.00
i2c_target_bad_addr 5.070s 5246.675us 1 1 100.00
target_mode_glitch 0 1 0.00
i2c_target_hrst 22.560s 10151.500us 0 1 0.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 2.160s 2102.015us 1 1 100.00
i2c_target_fifo_watermarks_tx 1.230s 139.080us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 10.900s 5049.978us 1 1 100.00
i2c_host_perf_precise 2.160s 227.225us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 7.810s 1203.666us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 4.490s 435.980us 1 1 100.00
target_mode_nack_generation 3 3 100.00
i2c_target_nack_acqfull 1.890s 1744.947us 1 1 100.00
i2c_target_nack_acqfull_addr 1.690s 1859.071us 1 1 100.00
i2c_target_nack_txstretch 1.370s 328.282us 1 1 100.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 2.230s 237.776us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 2.700s 494.726us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.730s 28.709us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.810s 16.755us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 1.320s 180.015us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 1.320s 180.015us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.780s 18.869us 1 1 100.00
i2c_csr_rw 0.900s 27.265us 1 1 100.00
i2c_csr_aliasing 1.740s 471.416us 1 1 100.00
i2c_same_csr_outstanding 1.070s 182.604us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.780s 18.869us 1 1 100.00
i2c_csr_rw 0.900s 27.265us 1 1 100.00
i2c_csr_aliasing 1.740s 471.416us 1 1 100.00
i2c_same_csr_outstanding 1.070s 182.604us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_tl_intg_err 1.850s 533.339us 1 1 100.00
i2c_sec_cm 1.010s 136.616us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.850s 533.339us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 8.520s 3547.753us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 0.880s 128.822us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 10.610s 7826.017us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between
i2c_host_error_intr 45676795464632713796233612419890104871221827065694675403962047598587954128198 110
UVM_ERROR @ 48157361 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 48157361 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
i2c_host_stress_all 3050646129300387814987742577836071479968333871069720211348453539263069192260 121
UVM_ERROR @ 2941467581 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 2941467581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
i2c_target_stress_all_with_rand_reset 94225940668841259331440758704396469296792292984829788751029306272024349522194 98
UVM_ERROR @ 7826017293 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 7826017293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between
i2c_target_glitch 36136376719529544198228242166313710553715766302458366415235633116146722269663 84
UVM_ERROR @ 1589383061 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
UVM_INFO @ 1589383061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
i2c_target_unexp_stop 73400627409831304354767910262246004462575776204874524821006703127578032440824 79
Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
UVM_ERROR @ 128822037 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
UVM_INFO @ 128822037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
i2c_target_hrst 105767876242744871961301612681055370188978884439811482034714015107424873346869 79
UVM_FATAL @ 10151500251 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
UVM_INFO @ 10151500251 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1236) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
i2c_host_stress_all_with_rand_reset 64602246777273135833935692040579708626738400117180756249958925885170164040805 86
UVM_ERROR @ 3547753150 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 3547753150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
i2c_host_mode_toggle 37779706422975074295736179807358048401821472172614219670162095804022643497498 87
UVM_ERROR @ 34333097 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
--> EXP:
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