| V1 |
|
0.00% |
| V2 |
|
0.00% |
| V2S |
|
0.00% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 0 | 1 | 0.00 | |||
| otp_ctrl_wake_up | 3.000s | 54.647us | 0 | 1 | 0.00 | |
| smoke | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 3.000s | 139.163us | 0 | 1 | 0.00 | |
| csr_hw_reset | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_hw_reset | 3.000s | 217.317us | 0 | 1 | 0.00 | |
| csr_rw | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_rw | 2.000s | 106.192us | 0 | 1 | 0.00 | |
| csr_bit_bash | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_bit_bash | 5.000s | 259.384us | 0 | 1 | 0.00 | |
| csr_aliasing | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_aliasing | 7.000s | 377.396us | 0 | 1 | 0.00 | |
| csr_mem_rw_with_rand_reset | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_mem_rw_with_rand_reset | 3.000s | 77.062us | 0 | 1 | 0.00 | |
| regwen_csr_and_corresponding_lockable_csr | 0 | 2 | 0.00 | |||
| otp_ctrl_csr_rw | 2.000s | 106.192us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_aliasing | 7.000s | 377.396us | 0 | 1 | 0.00 | |
| mem_walk | 0 | 1 | 0.00 | |||
| otp_ctrl_mem_walk | 3.000s | 43.607us | 0 | 1 | 0.00 | |
| mem_partial_access | 0 | 1 | 0.00 | |||
| otp_ctrl_mem_partial_access | 2.000s | 152.100us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| dai_access_partition_walk | 0 | 1 | 0.00 | |||
| otp_ctrl_partition_walk | 155.000s | 20228.873us | 0 | 1 | 0.00 | |
| init_fail | 0 | 1 | 0.00 | |||
| otp_ctrl_init_fail | 6.000s | 553.681us | 0 | 1 | 0.00 | |
| partition_check | 0 | 2 | 0.00 | |||
| otp_ctrl_background_chks | 12.000s | 728.342us | 0 | 1 | 0.00 | |
| otp_ctrl_check_fail | 97.000s | 22947.095us | 0 | 1 | 0.00 | |
| regwen_during_otp_init | 0 | 1 | 0.00 | |||
| otp_ctrl_regwen | 10.000s | 3742.679us | 0 | 1 | 0.00 | |
| partition_lock | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 8.000s | 510.875us | 0 | 1 | 0.00 | |
| interface_key_check | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_key_req | 28.000s | 1044.414us | 0 | 1 | 0.00 | |
| lc_interactions | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_req | 17.000s | 1097.170us | 0 | 1 | 0.00 | |
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| otp_dai_errors | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_errs | 14.000s | 1358.927us | 0 | 1 | 0.00 | |
| otp_macro_errors | 0 | 1 | 0.00 | |||
| otp_ctrl_macro_errs | 335.000s | 20435.688us | 0 | 1 | 0.00 | |
| test_access | 0 | 1 | 0.00 | |||
| otp_ctrl_test_access | 6.000s | 108.117us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| otp_ctrl_stress_all | 498.000s | 20374.802us | 0 | 1 | 0.00 | |
| intr_test | 0 | 1 | 0.00 | |||
| otp_ctrl_intr_test | 2.000s | 164.901us | 0 | 1 | 0.00 | |
| alert_test | 0 | 1 | 0.00 | |||
| otp_ctrl_alert_test | 3.000s | 1002.414us | 0 | 1 | 0.00 | |
| tl_d_oob_addr_access | 0 | 1 | 0.00 | |||
| otp_ctrl_tl_errors | 5.000s | 172.551us | 0 | 1 | 0.00 | |
| tl_d_illegal_access | 0 | 1 | 0.00 | |||
| otp_ctrl_tl_errors | 5.000s | 172.551us | 0 | 1 | 0.00 | |
| tl_d_outstanding_access | 0 | 4 | 0.00 | |||
| otp_ctrl_csr_hw_reset | 3.000s | 217.317us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_rw | 2.000s | 106.192us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_aliasing | 7.000s | 377.396us | 0 | 1 | 0.00 | |
| otp_ctrl_same_csr_outstanding | 5.000s | 177.352us | 0 | 1 | 0.00 | |
| tl_d_partial_access | 0 | 4 | 0.00 | |||
| otp_ctrl_csr_hw_reset | 3.000s | 217.317us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_rw | 2.000s | 106.192us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_aliasing | 7.000s | 377.396us | 0 | 1 | 0.00 | |
| otp_ctrl_same_csr_outstanding | 5.000s | 177.352us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| sec_cm_additional_check | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| tl_intg_err | 0 | 2 | 0.00 | |||
| otp_ctrl_tl_intg_err | 20.000s | 1618.922us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| prim_count_check | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| prim_fsm_check | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_bus_integrity | 0 | 1 | 0.00 | |||
| otp_ctrl_tl_intg_err | 20.000s | 1618.922us | 0 | 1 | 0.00 | |
| sec_cm_secret_mem_scramble | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 3.000s | 139.163us | 0 | 1 | 0.00 | |
| sec_cm_part_mem_digest | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 3.000s | 139.163us | 0 | 1 | 0.00 | |
| sec_cm_dai_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_kdi_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_lci_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_part_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_scrmbl_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_timer_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_dai_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_kdi_seed_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_kdi_entropy_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_lci_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_part_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_scrmbl_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_timer_integ_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_timer_cnsty_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_timer_lfsr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_dai_fsm_local_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_lci_fsm_local_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| sec_cm_kdi_fsm_local_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| sec_cm_part_fsm_local_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| otp_ctrl_macro_errs | 335.000s | 20435.688us | 0 | 1 | 0.00 | |
| sec_cm_scrmbl_fsm_local_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| sec_cm_timer_fsm_local_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_dai_fsm_global_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_lci_fsm_global_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| sec_cm_kdi_fsm_global_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| sec_cm_part_fsm_global_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| otp_ctrl_macro_errs | 335.000s | 20435.688us | 0 | 1 | 0.00 | |
| sec_cm_scrmbl_fsm_global_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| sec_cm_timer_fsm_global_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 252.709us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_part_data_reg_integrity | 0 | 1 | 0.00 | |||
| otp_ctrl_init_fail | 6.000s | 553.681us | 0 | 1 | 0.00 | |
| sec_cm_part_data_reg_bkgn_chk | 0 | 1 | 0.00 | |||
| otp_ctrl_check_fail | 97.000s | 22947.095us | 0 | 1 | 0.00 | |
| sec_cm_part_mem_regren | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 8.000s | 510.875us | 0 | 1 | 0.00 | |
| sec_cm_part_mem_sw_unreadable | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 8.000s | 510.875us | 0 | 1 | 0.00 | |
| sec_cm_part_mem_sw_unwritable | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 8.000s | 510.875us | 0 | 1 | 0.00 | |
| sec_cm_lc_part_mem_sw_noaccess | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 8.000s | 510.875us | 0 | 1 | 0.00 | |
| sec_cm_access_ctrl_mubi | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 8.000s | 510.875us | 0 | 1 | 0.00 | |
| sec_cm_token_valid_ctrl_mubi | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 3.000s | 139.163us | 0 | 1 | 0.00 | |
| sec_cm_lc_ctrl_intersig_mubi | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 8.000s | 510.875us | 0 | 1 | 0.00 | |
| sec_cm_test_bus_lc_gated | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 3.000s | 139.163us | 0 | 1 | 0.00 | |
| sec_cm_test_tl_lc_gate_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 456.000s | 20031.585us | 0 | 1 | 0.00 | |
| sec_cm_direct_access_config_regwen | 0 | 1 | 0.00 | |||
| otp_ctrl_regwen | 10.000s | 3742.679us | 0 | 1 | 0.00 | |
| sec_cm_check_trigger_config_regwen | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 3.000s | 139.163us | 0 | 1 | 0.00 | |
| sec_cm_check_config_regwen | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 3.000s | 139.163us | 0 | 1 | 0.00 | |
| sec_cm_macro_mem_integrity | 0 | 1 | 0.00 | |||
| otp_ctrl_macro_errs | 335.000s | 20435.688us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| otp_ctrl_low_freq_read | 0 | 1 | 0.00 | |||
| otp_ctrl_low_freq_read | 144.000s | 59430.288us | 0 | 1 | 0.00 | |
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| otp_ctrl_stress_all_with_rand_reset | 3.000s | 32.336us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_*/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_*/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name. | ||||
| otp_ctrl_tl_errors | 64064999581687869154972206781455505002604356775706716286066491065534564144887 | 193 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_tl_intg_err | 82749335604950894558301847974975287582909122059173860797168405816067782246512 | 482 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_intr_test | 11375840195331212570915550441898236460349159934341654973285331219124319701294 | 275 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_mem_walk | 61237372972895106840465273674740209576021706772897968125913645585411497931109 | 201 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_mem_partial_access | 50157212464930682878153027398546130354798639344791629776002282646393464886357 | 187 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_csr_hw_reset | 82861750664602850436854490862564654805738163804772649514126168938358047873292 | 195 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_csr_rw | 38558259553147567385770099235044003190116923389625927172016022372119371928337 | 189 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_csr_bit_bash | 5661138325369921329256289661133854268306508350873255346452839920767338283778 | 190 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_csr_aliasing | 101744175379153528175700763203476356323560424055508965630762822355367559147876 | 189 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_same_csr_outstanding | 69808160934419112087974467244451087108382685221155750306498572208440258907380 | 191 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_csr_mem_rw_with_rand_reset | 66812653210617913767279494295004676822939771774117270998487316136467829726438 | 194 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_*/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_*/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name. | ||||
| otp_ctrl_wake_up | 26028318747657516059777934179671383276918891910639722622228272821374717828773 | 187 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_init_fail | 53581797402790012105862824060705376625663827797048774128919201100701235515149 | 1306 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_parallel_lc_req | 70328788410296761178906273453590277399260115942797787022720497808914770477571 | 8532 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_alert_test | 64671521259295403813527110644286293906123119510638423351193772643828066814186 | 190 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| UVM_ERROR (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * | ||||
| otp_ctrl_smoke | 4615404273892218874948216891402486076356811778314314502738461441917268505643 | 435 |
UVM_ERROR @ 139162670 ps: (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 139162670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_regwen | 3691550825377059057791577488814708546751567138610025886308940159320653635169 | 8115 |
UVM_ERROR @ 3742679039 ps: (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 3742679039 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_partition_walk_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | ||||
| otp_ctrl_partition_walk | 1532898680431329186491995970491741055845284103173371275560590217193895116586 | 120724 |
UVM_ERROR @ 20228873279 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_partition_walk_vseq] Check failed rdata0 == exp_data0 (0 [0x0] vs 16080 [0x3ed0]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 20228873279 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | ||||
| otp_ctrl_low_freq_read | 219547194248075597673158189849474368834785315356883660093544297086451763675 | 110 |
UVM_ERROR @ 59430287942 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 59430287942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:672) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr | ||||
| otp_ctrl_background_chks | 27188885376843227534784717256404134201981103848808742219129505864490029651087 | 9986 |
UVM_ERROR @ 728342390 ps: (otp_ctrl_scoreboard.sv:672) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 728342390 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_parallel_key_req | 38037241588496738292145727249634388974889624513158838197129532346249543133968 | 21740 |
UVM_ERROR @ 1044413924 ps: (otp_ctrl_scoreboard.sv:672) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1044413924 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'm_tl_host_base_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | ||||
| otp_ctrl_parallel_lc_esc | 21113176150874598330013742425227207022610242443758665292337348991076769380238 | 661 |
UVM_ERROR @ 252708986 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.sequencer' for sequence 'm_tl_host_base_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 252708986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1321) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.intr_state | ||||
| otp_ctrl_dai_lock | 7930961860883701167870957477189211897242287357808031832592588674497087507740 | 5828 |
UVM_ERROR @ 510874746 ps: (otp_ctrl_scoreboard.sv:1321) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (3 [0x3] vs 1 [0x1]) reg name: otp_ctrl_core_reg_block.intr_state
UVM_INFO @ 510874746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (otp_ctrl_scoreboard.sv:1321) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* | ||||
| otp_ctrl_dai_errs | 53804373749766419693646314996138271463112001117590521187887416995017069360856 | 9655 |
UVM_ERROR @ 1358926954 ps: (otp_ctrl_scoreboard.sv:1321) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 1358926954 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otp_ctrl_test_access | 76130821814396952821023717305828757851991884843525712956130487441529400229887 | 4445 |
UVM_ERROR @ 108117379 ps: (otp_ctrl_scoreboard.sv:1321) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 108117379 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=35) | ||||
| otp_ctrl_check_fail | 58368421699020089026787669330691539264255488388353059620916821436464021518794 | 125887 |
UVM_FATAL @ 22947094724 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=0x154e0010, Comparison=CompareOpEq, exp_data=0x1, call_count=35)
UVM_INFO @ 22947094724 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=42) | ||||
| otp_ctrl_macro_errs | 36607735988979634387560909482684180619921554839201861125682691394200013765032 | 504686 |
UVM_FATAL @ 20435688199 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=0x16638010, Comparison=CompareOpEq, exp_data=0x1, call_count=42)
UVM_INFO @ 20435688199 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * | ||||
| otp_ctrl_stress_all_with_rand_reset | 35326025568298845479847756834021339269494629450014633143101788582257225887767 | 113 |
UVM_ERROR @ 32335825 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 32335825 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=71) | ||||
| otp_ctrl_stress_all | 5776950616243362291170530589363439101314008656272843452471756805345387933958 | 371416 |
UVM_FATAL @ 20374801840 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=0x92ef0010, Comparison=CompareOpEq, exp_data=0x1, call_count=71)
UVM_INFO @ 20374801840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=1) | ||||
| otp_ctrl_sec_cm | 6472197115512970980097490964423630127950064180526122020556399807567133954889 | 114 |
UVM_FATAL @ 20031585448 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=0xdc958010, Comparison=CompareOpEq, exp_data=0x1, call_count=1)
UVM_INFO @ 20031585448 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| Job killed most likely because its dependent job failed. | ||||
| otp_ctrl | None | None | ||
| otp_ctrl | None | None | ||