Simulation Results: aes/masked

 
07/04/2026 16:08:41 DVSim: v1.17.3 sha: ae672c6 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.05 %
  • code
  • 95.69 %
  • assert
  • 98.29 %
  • func
  • 70.18 %
  • block
  • 95.88 %
  • line
  • 97.58 %
  • branch
  • 89.78 %
  • toggle
  • 97.96 %
  • FSM
  • 97.42 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 64.619us 1 1 100.00
smoke 1 1 100.00
aes_smoke 4.000s 91.333us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 203.932us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 106.625us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 4.000s 338.946us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 288.006us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 89.440us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 106.625us 1 1 100.00
aes_csr_aliasing 3.000s 288.006us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 4.000s 91.333us 1 1 100.00
aes_config_error 4.000s 245.373us 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
key_length 3 3 100.00
aes_smoke 4.000s 91.333us 1 1 100.00
aes_config_error 4.000s 245.373us 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
back2back 2 2 100.00
aes_stress 9.000s 150.507us 1 1 100.00
aes_b2b 14.000s 754.313us 1 1 100.00
backpressure 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 4.000s 91.333us 1 1 100.00
aes_config_error 4.000s 245.373us 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
aes_alert_reset 4.000s 832.084us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 111.415us 1 1 100.00
aes_config_error 4.000s 245.373us 1 1 100.00
aes_alert_reset 4.000s 832.084us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 6.000s 151.513us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 27.000s 2886.780us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 10.000s 983.953us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 4.000s 832.084us 1 1 100.00
stress 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
sideload 2 2 100.00
aes_stress 9.000s 150.507us 1 1 100.00
aes_sideload 2.000s 65.850us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 4.000s 299.103us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 14.000s 314.219us 1 1 100.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 6.000s 208.045us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 84.719us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 164.323us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 164.323us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 203.932us 1 1 100.00
aes_csr_rw 2.000s 106.625us 1 1 100.00
aes_csr_aliasing 3.000s 288.006us 1 1 100.00
aes_same_csr_outstanding 2.000s 76.712us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 203.932us 1 1 100.00
aes_csr_rw 2.000s 106.625us 1 1 100.00
aes_csr_aliasing 3.000s 288.006us 1 1 100.00
aes_same_csr_outstanding 2.000s 76.712us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 5.000s 145.085us 1 1 100.00
fault_inject 3 3 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_control_fi 2.000s 59.253us 1 1 100.00
aes_cipher_fi 2.000s 83.921us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 73.135us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 73.135us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 73.135us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 73.135us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 4.000s 515.464us 1 1 100.00
tl_intg_err 2 2 100.00
aes_tl_intg_err 4.000s 631.734us 1 1 100.00
aes_sec_cm 4.000s 470.669us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 4.000s 631.734us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 4.000s 832.084us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 73.135us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 73.135us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 4.000s 91.333us 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
aes_alert_reset 4.000s 832.084us 1 1 100.00
aes_core_fi 3.000s 62.394us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 6.000s 208.045us 1 1 100.00
aes_config_error 4.000s 245.373us 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
aes_core_fi 3.000s 62.394us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 73.135us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 85.793us 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 9.000s 150.507us 1 1 100.00
aes_sideload 2.000s 65.850us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 85.793us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 85.793us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 85.793us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 85.793us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 85.793us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 9.000s 150.507us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 3.000s 225.211us 1 1 100.00
sec_cm_main_fsm_redun 4 4 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_control_fi 2.000s 59.253us 1 1 100.00
aes_cipher_fi 2.000s 83.921us 1 1 100.00
aes_ctr_fi 2.000s 110.376us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 3.000s 225.211us 1 1 100.00
sec_cm_cipher_fsm_redun 3 3 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_control_fi 2.000s 59.253us 1 1 100.00
aes_cipher_fi 2.000s 83.921us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 83.921us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 3.000s 225.211us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_control_fi 2.000s 59.253us 1 1 100.00
aes_ctr_fi 2.000s 110.376us 1 1 100.00
sec_cm_ghash_fsm_sparse 1 1 100.00
aes_fi 3.000s 225.211us 1 1 100.00
sec_cm_ctrl_sparse 4 4 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_control_fi 2.000s 59.253us 1 1 100.00
aes_cipher_fi 2.000s 83.921us 1 1 100.00
aes_ctr_fi 2.000s 110.376us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 4.000s 832.084us 1 1 100.00
sec_cm_main_fsm_local_esc 4 4 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_control_fi 2.000s 59.253us 1 1 100.00
aes_cipher_fi 2.000s 83.921us 1 1 100.00
aes_ctr_fi 2.000s 110.376us 1 1 100.00
sec_cm_cipher_fsm_local_esc 4 4 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_control_fi 2.000s 59.253us 1 1 100.00
aes_cipher_fi 2.000s 83.921us 1 1 100.00
aes_ctr_fi 2.000s 110.376us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_control_fi 2.000s 59.253us 1 1 100.00
aes_ctr_fi 2.000s 110.376us 1 1 100.00
sec_cm_ghash_fsm_local_esc 2 2 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_ghash_fi 2.000s 64.272us 1 1 100.00
sec_cm_data_reg_local_esc 3 3 100.00
aes_fi 3.000s 225.211us 1 1 100.00
aes_control_fi 2.000s 59.253us 1 1 100.00
aes_cipher_fi 2.000s 83.921us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 20.000s 1503.178us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_base_vseq.sv:75) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed)
aes_stress_all_with_rand_reset 40810405869098907931973919206162510661212751145621645380303036718962060210389 765
UVM_FATAL @ 1503178141 ps: (aes_base_vseq.sv:75) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
UVM_INFO @ 1503178141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---