Simulation Results: rstmgr_cnsty_chk

 
07/04/2026 16:08:41 DVSim: v1.17.3 sha: ae672c6 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 81.56 %
  • code
  • 96.45 %
  • assert
  • 66.67 %
  • block
  • 95.61 %
  • line
  • 96.32 %
  • branch
  • 94.25 %
  • toggle
  • 100.00 %
  • FSM
  • 95.24 %
Validation stages
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
rstmgr_cnsty_chk_test 1.000s 9271.485us 1 1 100.00