Simulation Results: keymgr

 
09/04/2026 16:08:58 DVSim: v1.17.3 sha: af1ceab json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.47 %
  • code
  • 96.06 %
  • assert
  • 97.01 %
  • func
  • 72.33 %
  • block
  • 98.88 %
  • line
  • 99.55 %
  • branch
  • 95.72 %
  • toggle
  • 98.55 %
  • FSM
  • 90.41 %
Validation stages
V1
100.00%
V2
100.00%
V2S
90.91%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 3.000s 42.010us 1 1 100.00
random 1 1 100.00
keymgr_random 4.000s 290.828us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 2.000s 17.266us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.000s 228.633us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 9.000s 253.532us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 6.000s 246.001us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 2.000s 118.427us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.000s 228.633us 1 1 100.00
keymgr_csr_aliasing 6.000s 246.001us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 3.000s 39.091us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 4.000s 67.142us 1 1 100.00
keymgr_sideload_kmac 3.000s 77.184us 1 1 100.00
keymgr_sideload_aes 2.000s 86.390us 1 1 100.00
keymgr_sideload_otbn 4.000s 77.823us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 11.000s 614.658us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 4.000s 92.104us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 3.000s 240.902us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 4.000s 853.326us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 3.000s 101.371us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 8.000s 316.160us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 34.000s 6412.663us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 1.000s 22.014us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 1.000s 12.807us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.000s 643.311us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.000s 643.311us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 2.000s 17.266us 1 1 100.00
keymgr_csr_rw 1.000s 228.633us 1 1 100.00
keymgr_csr_aliasing 6.000s 246.001us 1 1 100.00
keymgr_same_csr_outstanding 2.000s 370.268us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 2.000s 17.266us 1 1 100.00
keymgr_csr_rw 1.000s 228.633us 1 1 100.00
keymgr_csr_aliasing 6.000s 246.001us 1 1 100.00
keymgr_same_csr_outstanding 2.000s 370.268us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
keymgr_tl_intg_err 3.000s 271.215us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 4.000s 252.524us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 4.000s 252.524us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 4.000s 252.524us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 4.000s 252.524us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 13.000s 600.056us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.000s 271.215us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 4.000s 252.524us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 3.000s 39.091us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 4.000s 290.828us 1 1 100.00
keymgr_csr_rw 1.000s 228.633us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 4.000s 290.828us 1 1 100.00
keymgr_csr_rw 1.000s 228.633us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 4.000s 290.828us 1 1 100.00
keymgr_csr_rw 1.000s 228.633us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 4.000s 92.104us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.000s 101.371us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.000s 101.371us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 4.000s 290.828us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 3.000s 64.014us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
sec_cm_ctrl_fsm_consistency 0 1 0.00
keymgr_custom_cm 1.000s 0.000us 0 1 0.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 4.000s 92.104us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 0 1 0.00
keymgr_custom_cm 1.000s 0.000us 0 1 0.00
sec_cm_kmac_if_done_ctrl_consistency 0 1 0.00
keymgr_custom_cm 1.000s 0.000us 0 1 0.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 0 1 0.00
keymgr_custom_cm 1.000s 0.000us 0 1 0.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.000s 584.131us 1 1 100.00
sec_cm_ctrl_key_integrity 0 1 0.00
keymgr_custom_cm 1.000s 0.000us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 11.000s 749.542us 1 1 100.00

Error Messages

   Test seed line log context
Job returned non-zero exit code
keymgr_custom_cm 103103330072971643757407896809544292574157519097873398629851551551753815889834 None
|
xmsim: *W,SVRNDF (/nightly/current_run/scratch/master/keymgr-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_keymgr_env_0.1/seq_lib/keymgr_custom_cm_vseq.sv,13|21): The randomize method call failed. The unique id of the failed randomize call is 9.
Observed simulation time : 0 FS + 44.
xmsim: *F,RNDUNR: XCELIGEN assertion failed - 0
File - /dev/shm/avs_local_builds/avs_ramdisk_client_rifclx847/tbv/rnc/src/api/rnc_inside.cpp:1375, func - static rnc_node_sp rnc_node::new_inside_elt_node(const rnc_node_sp&, const rnc_node_sp&, rnc_sm)
Stacktrace:
0: rnc_assert_exception::rnc_assert_exception(char const*, int, char const*, char const*)
1: .
TOOL: xrun(64) 24.03-s007: Exiting on Apr 09, 2026 at 16:11:50 UTC (total: 00:00:01)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:64: simulate] Error 2