| V1 |
|
0.00% |
| V2 |
|
0.00% |
| V2S |
|
0.00% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| wake_up | 0 | 1 | 0.00 | |||
| otp_ctrl_wake_up | 3.000s | 827.131us | 0 | 1 | 0.00 | |
| smoke | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 7.000s | 2588.292us | 0 | 1 | 0.00 | |
| csr_hw_reset | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_hw_reset | 6.000s | 1946.500us | 0 | 1 | 0.00 | |
| csr_rw | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_rw | 2.000s | 47.438us | 0 | 1 | 0.00 | |
| csr_bit_bash | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_bit_bash | 5.000s | 507.139us | 0 | 1 | 0.00 | |
| csr_aliasing | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_aliasing | 10.000s | 651.705us | 0 | 1 | 0.00 | |
| csr_mem_rw_with_rand_reset | 0 | 1 | 0.00 | |||
| otp_ctrl_csr_mem_rw_with_rand_reset | 2.000s | 498.401us | 0 | 1 | 0.00 | |
| regwen_csr_and_corresponding_lockable_csr | 0 | 2 | 0.00 | |||
| otp_ctrl_csr_rw | 2.000s | 47.438us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_aliasing | 10.000s | 651.705us | 0 | 1 | 0.00 | |
| mem_walk | 0 | 1 | 0.00 | |||
| otp_ctrl_mem_walk | 2.000s | 76.309us | 0 | 1 | 0.00 | |
| mem_partial_access | 0 | 1 | 0.00 | |||
| otp_ctrl_mem_partial_access | 3.000s | 157.509us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| dai_access_partition_walk | 0 | 1 | 0.00 | |||
| otp_ctrl_partition_walk | 143.000s | 2307.261us | 0 | 1 | 0.00 | |
| init_fail | 0 | 1 | 0.00 | |||
| otp_ctrl_init_fail | 7.000s | 230.093us | 0 | 1 | 0.00 | |
| partition_check | 0 | 2 | 0.00 | |||
| otp_ctrl_background_chks | 7.000s | 158.848us | 0 | 1 | 0.00 | |
| otp_ctrl_check_fail | 102.000s | 20592.663us | 0 | 1 | 0.00 | |
| regwen_during_otp_init | 0 | 1 | 0.00 | |||
| otp_ctrl_regwen | 7.000s | 140.945us | 0 | 1 | 0.00 | |
| partition_lock | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 19.000s | 1034.470us | 0 | 1 | 0.00 | |
| interface_key_check | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_key_req | 10.000s | 200.701us | 0 | 1 | 0.00 | |
| lc_interactions | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_req | 10.000s | 1263.356us | 0 | 1 | 0.00 | |
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| otp_dai_errors | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_errs | 8.000s | 645.866us | 0 | 1 | 0.00 | |
| otp_macro_errors | 0 | 1 | 0.00 | |||
| otp_ctrl_macro_errs | 300.000s | 20301.331us | 0 | 1 | 0.00 | |
| test_access | 0 | 1 | 0.00 | |||
| otp_ctrl_test_access | 13.000s | 2571.401us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| otp_ctrl_stress_all | 63.000s | 22215.066us | 0 | 1 | 0.00 | |
| intr_test | 0 | 1 | 0.00 | |||
| otp_ctrl_intr_test | 2.000s | 111.265us | 0 | 1 | 0.00 | |
| alert_test | 0 | 1 | 0.00 | |||
| otp_ctrl_alert_test | 4.000s | 99.580us | 0 | 1 | 0.00 | |
| tl_d_oob_addr_access | 0 | 1 | 0.00 | |||
| otp_ctrl_tl_errors | 7.000s | 79.308us | 0 | 1 | 0.00 | |
| tl_d_illegal_access | 0 | 1 | 0.00 | |||
| otp_ctrl_tl_errors | 7.000s | 79.308us | 0 | 1 | 0.00 | |
| tl_d_outstanding_access | 0 | 4 | 0.00 | |||
| otp_ctrl_csr_hw_reset | 6.000s | 1946.500us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_rw | 2.000s | 47.438us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_aliasing | 10.000s | 651.705us | 0 | 1 | 0.00 | |
| otp_ctrl_same_csr_outstanding | 4.000s | 102.505us | 0 | 1 | 0.00 | |
| tl_d_partial_access | 0 | 4 | 0.00 | |||
| otp_ctrl_csr_hw_reset | 6.000s | 1946.500us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_rw | 2.000s | 47.438us | 0 | 1 | 0.00 | |
| otp_ctrl_csr_aliasing | 10.000s | 651.705us | 0 | 1 | 0.00 | |
| otp_ctrl_same_csr_outstanding | 4.000s | 102.505us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| sec_cm_additional_check | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| tl_intg_err | 0 | 2 | 0.00 | |||
| otp_ctrl_tl_intg_err | 23.000s | 7826.643us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| prim_count_check | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| prim_fsm_check | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_bus_integrity | 0 | 1 | 0.00 | |||
| otp_ctrl_tl_intg_err | 23.000s | 7826.643us | 0 | 1 | 0.00 | |
| sec_cm_secret_mem_scramble | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 7.000s | 2588.292us | 0 | 1 | 0.00 | |
| sec_cm_part_mem_digest | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 7.000s | 2588.292us | 0 | 1 | 0.00 | |
| sec_cm_dai_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_kdi_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_lci_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_part_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_scrmbl_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_timer_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_dai_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_kdi_seed_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_kdi_entropy_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_lci_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_part_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_scrmbl_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_timer_integ_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_timer_cnsty_ctr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_timer_lfsr_redun | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_dai_fsm_local_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_lci_fsm_local_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| sec_cm_kdi_fsm_local_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| sec_cm_part_fsm_local_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| otp_ctrl_macro_errs | 300.000s | 20301.331us | 0 | 1 | 0.00 | |
| sec_cm_scrmbl_fsm_local_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| sec_cm_timer_fsm_local_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_dai_fsm_global_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_lci_fsm_global_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| sec_cm_kdi_fsm_global_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| sec_cm_part_fsm_global_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| otp_ctrl_macro_errs | 300.000s | 20301.331us | 0 | 1 | 0.00 | |
| sec_cm_scrmbl_fsm_global_esc | 0 | 1 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| sec_cm_timer_fsm_global_esc | 0 | 2 | 0.00 | |||
| otp_ctrl_parallel_lc_esc | 3.000s | 57.121us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_part_data_reg_integrity | 0 | 1 | 0.00 | |||
| otp_ctrl_init_fail | 7.000s | 230.093us | 0 | 1 | 0.00 | |
| sec_cm_part_data_reg_bkgn_chk | 0 | 1 | 0.00 | |||
| otp_ctrl_check_fail | 102.000s | 20592.663us | 0 | 1 | 0.00 | |
| sec_cm_part_mem_regren | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 19.000s | 1034.470us | 0 | 1 | 0.00 | |
| sec_cm_part_mem_sw_unreadable | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 19.000s | 1034.470us | 0 | 1 | 0.00 | |
| sec_cm_part_mem_sw_unwritable | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 19.000s | 1034.470us | 0 | 1 | 0.00 | |
| sec_cm_lc_part_mem_sw_noaccess | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 19.000s | 1034.470us | 0 | 1 | 0.00 | |
| sec_cm_access_ctrl_mubi | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 19.000s | 1034.470us | 0 | 1 | 0.00 | |
| sec_cm_token_valid_ctrl_mubi | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 7.000s | 2588.292us | 0 | 1 | 0.00 | |
| sec_cm_lc_ctrl_intersig_mubi | 0 | 1 | 0.00 | |||
| otp_ctrl_dai_lock | 19.000s | 1034.470us | 0 | 1 | 0.00 | |
| sec_cm_test_bus_lc_gated | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 7.000s | 2588.292us | 0 | 1 | 0.00 | |
| sec_cm_test_tl_lc_gate_fsm_sparse | 0 | 1 | 0.00 | |||
| otp_ctrl_sec_cm | 227.000s | 20063.408us | 0 | 1 | 0.00 | |
| sec_cm_direct_access_config_regwen | 0 | 1 | 0.00 | |||
| otp_ctrl_regwen | 7.000s | 140.945us | 0 | 1 | 0.00 | |
| sec_cm_check_trigger_config_regwen | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 7.000s | 2588.292us | 0 | 1 | 0.00 | |
| sec_cm_check_config_regwen | 0 | 1 | 0.00 | |||
| otp_ctrl_smoke | 7.000s | 2588.292us | 0 | 1 | 0.00 | |
| sec_cm_macro_mem_integrity | 0 | 1 | 0.00 | |||
| otp_ctrl_macro_errs | 300.000s | 20301.331us | 0 | 1 | 0.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| otp_ctrl_low_freq_read | 0 | 1 | 0.00 | |||
| otp_ctrl_low_freq_read | 99.000s | 46134.026us | 0 | 1 | 0.00 | |
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| otp_ctrl_stress_all_with_rand_reset | 7.000s | 94.361us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_*/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_*/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name. | ||||
| otp_ctrl_tl_errors | 24524817057575135249942564698592829827011395285154413441390410046583000866832 | 193 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_tl_intg_err | 31129914345296408012279768950690871678515339168486760299566786115498791963120 | 529 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_intr_test | 76501961694111399783922481018162264416893688707857768542474274460615392639458 | 275 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_mem_walk | 39274872900560117863681008654022898907038477842111666718113493913070051088448 | 201 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_mem_partial_access | 94617007166871379397460208519659440613891239694866365063962531050000525033540 | 187 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_csr_hw_reset | 77162104450981684348011365587398741820734777045745692754278717702298327912491 | 197 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_csr_rw | 7564028759272326693048733841138958570641604852888714353443894778661640575219 | 190 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_csr_bit_bash | 70438609988808279017490458632266747563943480044579827735300694059139449988033 | 190 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_csr_aliasing | 67924201910425168690525574378646770115436231283724660123862599357209538595814 | 190 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_same_csr_outstanding | 63663999637303879959024631428010935662340122578451283885059753740116476655144 | 191 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/cover_reg_top/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| UVM_ERROR (cip_base_scoreboard.sv:632) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * | ||||
| otp_ctrl_csr_mem_rw_with_rand_reset | 50153654529527040291390133331092621691025329402939280219812483020040022987431 | 112 |
UVM_ERROR @ 498401351 ps: (cip_base_scoreboard.sv:632) [uvm_test_top.env.scoreboard] Check failed item.d_data == exp_data (0 [0x0] vs 4294967295 [0xffffffff]) d_data mismatch when d_error = 1
UVM_INFO @ 498401351 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_*/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_*/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name. | ||||
| otp_ctrl_wake_up | 64443880431604945299988095705614479634660918601465719422080415767024440565382 | 187 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_smoke | 73594339456758445183266000354690363888989489263254757448623303898992365785585 | 2376 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_init_fail | 83942285029965727465364042337000515520611719262843787666598347081916476650411 | 1112 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_parallel_lc_req | 51824883848872044387926176706058491128288685964688315486677682889202694978231 | 5464 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_regwen | 5007534306570685306665575477002457682854729059162815877098665603415010402983 | 2400 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_test_access | 114691578762124550521158109972533851562959471858986750308495893706369604008423 | 3672 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
|
|
| otp_ctrl_alert_test | 97525519811005083349747402579206935943070470925280112932507769790361850740907 | 189 |
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *E,COVITS: Covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with 'unbuf_err_code_cg_wrap[]' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance unbuf_err_code_cg (/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv:12) with the same instance name 'unbuf_err_code_cg_wrap[]'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "lc_esc_en_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 71.
xmsim: *W,CGPIZE: Instance coverage for covergroup instance "sram_0_req_condition_cg_inst" will not be dumped to database as per_instance option value is set to 0:/nightly/current_run/scratch/master/otp_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_darjeeling_dv_otp_ctrl_cov_0/otp_ctrl_cov_if.sv, 72.
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| UVM_ERROR (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [*] vs * [*]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: * | ||||
| otp_ctrl_partition_walk | 65360015892722573538958984258265232630689308512617940164799037030965512423067 | 165176 |
UVM_ERROR @ 2307261144 ps: (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: otp_ctrl_core_reg_block.status.dai_idle reset value: 0x0
UVM_INFO @ 2307261144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (otp_ctrl_base_vseq.sv:215) [otp_ctrl_low_freq_read_vseq] Check failed rdata* == exp_data* (* [*] vs * [*]) dai addr *ed* rdata* readout mismatch | ||||
| otp_ctrl_low_freq_read | 102985907197060999356481578710158142510100421898411672441412085272901938638468 | 110 |
UVM_ERROR @ 46134025712 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 46134025712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otp_ctrl_stress_all | 72557582416366448387452840164529484661784020552491674826823894674812544659207 | 111 |
UVM_ERROR @ 22215065857 ps: (otp_ctrl_base_vseq.sv:215) [uvm_test_top.env.virtual_sequencer.otp_ctrl_low_freq_read_vseq] Check failed rdata0 == exp_data0 (16080 [0x3ed0] vs 3032406676 [0xb4beda94]) dai addr 3ed0 rdata0 readout mismatch
UVM_INFO @ 22215065857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (otp_ctrl_scoreboard.sv:1321) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.err_code_* | ||||
| otp_ctrl_background_chks | 100073938304887022665988503408821274919660637488255609471048225764917896761921 | 1807 |
UVM_ERROR @ 158847824 ps: (otp_ctrl_scoreboard.sv:1321) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 158847824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otp_ctrl_dai_errs | 77160938612448623543173514042622703473717351780632468973227187410234591502978 | 6007 |
UVM_ERROR @ 645865993 ps: (otp_ctrl_scoreboard.sv:1321) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 645865993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otp_ctrl_parallel_key_req | 41202122178055862211519787111675363904206651210073723708996910625359976981740 | 8841 |
UVM_ERROR @ 200701401 ps: (otp_ctrl_scoreboard.sv:1321) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 200701401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otp_ctrl_stress_all_with_rand_reset | 55647823862281422863104490439019626521032468188075346266851060924144204040750 | 3041 |
UVM_ERROR @ 94360815 ps: (otp_ctrl_scoreboard.sv:1321) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (4 [0x4] vs 5 [0x5]) reg name: otp_ctrl_core_reg_block.err_code_22
UVM_INFO @ 94360815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues | ||||
| otp_ctrl_parallel_lc_esc | 11118304084122935823305777934330906521532156220804032591262238797704234521888 | 237 |
UVM_ERROR @ 57121161 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 57121161 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_ERROR (otp_ctrl_scoreboard.sv:672) [scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (* [*] vs * [*]) Interrupt_pin: OtpErr | ||||
| otp_ctrl_dai_lock | 18254210643118715690604034542711129137261309341599402369583841794288683408605 | 7878 |
UVM_ERROR @ 1034470268 ps: (otp_ctrl_scoreboard.sv:672) [uvm_test_top.env.scoreboard] Check failed cfg.intr_vif.pins[i] === (intr_en[i] & intr_exp[i]) (0x0 [0] vs 0x1 [1]) Interrupt_pin: OtpErr
UVM_INFO @ 1034470268 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) | ||||
| otp_ctrl_check_fail | 63653639293506552269023142482339477135412906753541180022281554448133846998413 | 120544 |
UVM_FATAL @ 20592663309 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=0x67a08010, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 20592663309 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=13) | ||||
| otp_ctrl_macro_errs | 35225684474936015499011050917725221747027967078090591523225720789107636936609 | 482963 |
UVM_FATAL @ 20301330653 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=0x2d9a8010, Comparison=CompareOpEq, exp_data=0x1, call_count=13)
UVM_INFO @ 20301330653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=1) | ||||
| otp_ctrl_sec_cm | 6940303175693004300878126004346330311503863972015688979778455846667926130916 | 114 |
UVM_FATAL @ 20063407824 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout otp_ctrl_core_reg_block.status.dai_idle (addr=0x12a58010, Comparison=CompareOpEq, exp_data=0x1, call_count=1)
UVM_INFO @ 20063407824 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| Job killed most likely because its dependent job failed. | ||||
| otp_ctrl | None | None | ||
| otp_ctrl | None | None | ||