Simulation Results: ac_range_check

 
27/04/2026 19:39:13 DVSim: v1.32.0 sha: 4c58639 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 82.84 %
  • code
  • 92.97 %
  • assert
  • 97.75 %
  • func
  • 57.79 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 80.73 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 23.000s 480.808us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 35.000s 14379.777us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 3.000s 248.381us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 2.000s 85.633us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 24.000s 5270.471us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 20.000s 4950.136us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 2.000s 31.491us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 2.000s 85.633us 1 1 100.00
ac_range_check_csr_aliasing 20.000s 4950.136us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 3.000s 186.596us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 26.000s 1042.887us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 177.000s 31888.642us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 1.000s 35.963us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 2.000s 36.986us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 4.000s 224.724us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 4.000s 224.724us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 3.000s 248.381us 1 1 100.00
ac_range_check_csr_rw 2.000s 85.633us 1 1 100.00
ac_range_check_csr_aliasing 20.000s 4950.136us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 298.606us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 3.000s 248.381us 1 1 100.00
ac_range_check_csr_rw 2.000s 85.633us 1 1 100.00
ac_range_check_csr_aliasing 20.000s 4950.136us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 298.606us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 1689.557us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 1689.557us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 1689.557us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 1689.557us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 83.000s 51370.369us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 1.000s 10.339us 1 1 100.00
ac_range_check_tl_intg_err 6.000s 222.772us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 252.000s 1580.357us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 24.000s 1278.659us 1 1 100.00