Simulation Results: entropy_src/rng_16bits

 
28/04/2026 19:39:18 DVSim: v1.32.0 sha: 53d03cc json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 66.98 %
  • code
  • 81.16 %
  • assert
  • 72.94 %
  • func
  • 46.83 %
  • block
  • 94.00 %
  • line
  • 97.83 %
  • branch
  • 85.60 %
  • toggle
  • 52.66 %
  • FSM
  • 88.54 %
Validation stages
V1
83.33%
V2
93.75%
V2S
85.71%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 3.000s 48.928us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 25.355us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 1.000s 96.833us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 9.000s 755.177us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 4.000s 36.957us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 126.919us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 1.000s 96.833us 1 1 100.00
entropy_src_csr_aliasing 4.000s 36.957us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 2 3 66.67
entropy_src_smoke 3.000s 48.928us 1 1 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
entropy_src_fw_ov 99.000s 3698.186us 0 1 0.00
firmware_mode 0 1 0.00
entropy_src_fw_ov 99.000s 3698.186us 0 1 0.00
rng_mode 1 1 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 431.000s 13057.829us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
entropy_src_intr 25.000s 10490.281us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
entropy_src_functional_alerts 5.000s 337.016us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 149.000s 13473.375us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 320.469us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 49.000s 5191.175us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 12.357us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 48.257us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 82.183us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 82.183us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 25.355us 1 1 100.00
entropy_src_csr_rw 1.000s 96.833us 1 1 100.00
entropy_src_csr_aliasing 4.000s 36.957us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 31.568us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 25.355us 1 1 100.00
entropy_src_csr_rw 1.000s 96.833us 1 1 100.00
entropy_src_csr_aliasing 4.000s 36.957us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 31.568us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 3.000s 61.233us 1 1 100.00
entropy_src_tl_intg_err 5.000s 132.960us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
entropy_src_cfg_regwen 3.000s 16.186us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
sec_cm_intersig_mubi 1 2 50.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
entropy_src_fw_ov 99.000s 3698.186us 0 1 0.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 320.469us 1 1 100.00
entropy_src_sec_cm 3.000s 61.233us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 320.469us 1 1 100.00
entropy_src_sec_cm 3.000s 61.233us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 74.000s 14056.325us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 320.469us 1 1 100.00
entropy_src_sec_cm 3.000s 61.233us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 320.469us 1 1 100.00
entropy_src_sec_cm 3.000s 61.233us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 320.469us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 5.000s 337.016us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 5.000s 132.960us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 45.000s 14083.104us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:354) scoreboard [scoreboard] alert recov_alert did not trigger max_delay:*
entropy_src_fw_ov 41474573362474852137417532794931648669609117330746189187064323785844374451781 851
UVM_INFO @ 3698186470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_lo_total_fails
entropy_src_csr_mem_rw_with_rand_reset 15471859758290332111534345050520436180173456812465534110113268723266153688755 113
UVM_INFO @ 126919054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---