Simulation Results: otbn

 
29/04/2026 19:39:04 DVSim: v1.33.0 sha: a64a82b json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 94.08 %
  • code
  • 95.32 %
  • assert
  • 89.88 %
  • func
  • 97.03 %
  • block
  • 99.40 %
  • line
  • 99.58 %
  • branch
  • 92.36 %
  • toggle
  • 91.89 %
  • FSM
  • 97.44 %
Validation stages
V1
100.00%
V2
92.86%
V2S
92.00%
V3
0.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
otbn_smoke 10.000s 71.156us 1 1 100.00
single_binary 1 1 100.00
otbn_single 14.000s 138.836us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 3.000s 14.871us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 3.000s 41.183us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 5.000s 451.240us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 4.000s 23.180us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 5.000s 32.124us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 3.000s 41.183us 1 1 100.00
otbn_csr_aliasing 4.000s 23.180us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 91.000s 9921.154us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 27.000s 712.650us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 1 1 100.00
otbn_reset 36.000s 146.784us 1 1 100.00
multi_error 1 1 100.00
otbn_multi_err 44.000s 433.270us 1 1 100.00
back_to_back 1 1 100.00
otbn_multi 64.000s 197.440us 1 1 100.00
stress_all 1 1 100.00
otbn_stress_all 63.000s 268.365us 1 1 100.00
lc_escalation 1 1 100.00
otbn_escalate 8.000s 36.349us 1 1 100.00
zero_state_err_urnd 0 1 0.00
otbn_zero_state_err_urnd 3.000s 12.984us 0 1 0.00
sw_errs_fatal_chk 1 1 100.00
otbn_sw_errs_fatal_chk 13.000s 34.401us 1 1 100.00
alert_test 1 1 100.00
otbn_alert_test 4.000s 16.927us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 3.000s 202.751us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 7.000s 199.751us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 7.000s 199.751us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 3.000s 14.871us 1 1 100.00
otbn_csr_rw 3.000s 41.183us 1 1 100.00
otbn_csr_aliasing 4.000s 23.180us 1 1 100.00
otbn_same_csr_outstanding 3.000s 46.397us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 3.000s 14.871us 1 1 100.00
otbn_csr_rw 3.000s 41.183us 1 1 100.00
otbn_csr_aliasing 4.000s 23.180us 1 1 100.00
otbn_same_csr_outstanding 3.000s 46.397us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 2 2 100.00
otbn_imem_err 5.000s 35.734us 1 1 100.00
otbn_dmem_err 8.000s 24.860us 1 1 100.00
internal_integrity 3 4 75.00
otbn_alu_bignum_mod_err 6.000s 17.672us 1 1 100.00
otbn_controller_ispr_rdata_err 10.000s 93.754us 1 1 100.00
otbn_mac_bignum_acc_err 9.000s 59.430us 1 1 100.00
otbn_urnd_err 4.000s 11.231us 0 1 0.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 5.000s 9.977us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 6.000s 37.421us 1 1 100.00
otbn_non_sec_partial_wipe 1 1 100.00
otbn_partial_wipe 4.000s 16.121us 1 1 100.00
tl_intg_err 2 2 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
otbn_tl_intg_err 13.000s 91.436us 1 1 100.00
passthru_mem_tl_intg_err 1 1 100.00
otbn_passthru_mem_tl_intg_err 38.000s 201.951us 1 1 100.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 10.000s 71.156us 1 1 100.00
sec_cm_data_mem_integrity 1 1 100.00
otbn_dmem_err 8.000s 24.860us 1 1 100.00
sec_cm_instruction_mem_integrity 1 1 100.00
otbn_imem_err 5.000s 35.734us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 13.000s 91.436us 1 1 100.00
sec_cm_controller_fsm_global_esc 1 1 100.00
otbn_escalate 8.000s 36.349us 1 1 100.00
sec_cm_controller_fsm_local_esc 4 5 80.00
otbn_imem_err 5.000s 35.734us 1 1 100.00
otbn_dmem_err 8.000s 24.860us 1 1 100.00
otbn_zero_state_err_urnd 3.000s 12.984us 0 1 0.00
otbn_illegal_mem_acc 5.000s 9.977us 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 14.000s 138.836us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 5.000s 35.734us 1 1 100.00
otbn_dmem_err 8.000s 24.860us 1 1 100.00
otbn_zero_state_err_urnd 3.000s 12.984us 0 1 0.00
otbn_illegal_mem_acc 5.000s 9.977us 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 1 1 100.00
otbn_escalate 8.000s 36.349us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 5.000s 35.734us 1 1 100.00
otbn_dmem_err 8.000s 24.860us 1 1 100.00
otbn_zero_state_err_urnd 3.000s 12.984us 0 1 0.00
otbn_illegal_mem_acc 5.000s 9.977us 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 14.000s 138.836us 1 1 100.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 6.000s 163.091us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 5.000s 38.901us 1 1 100.00
sec_cm_rnd_bus_consistency 1 1 100.00
otbn_rnd_sec_cm 23.000s 147.281us 1 1 100.00
sec_cm_rnd_rng_digest 1 1 100.00
otbn_rnd_sec_cm 23.000s 147.281us 1 1 100.00
sec_cm_rf_base_data_reg_sw_integrity 1 1 100.00
otbn_rf_base_intg_err 9.000s 33.201us 1 1 100.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 1 1 100.00
otbn_rf_bignum_intg_err 7.000s 208.903us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
sec_cm_loop_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 13.000s 72.645us 1 1 100.00
sec_cm_call_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 13.000s 72.645us 1 1 100.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 4.000s 22.442us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 14.000s 138.836us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 14.000s 138.836us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 14.000s 138.836us 1 1 100.00
sec_cm_write_mem_integrity 1 1 100.00
otbn_multi 64.000s 197.440us 1 1 100.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 14.000s 138.836us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 14.000s 138.836us 1 1 100.00
sec_cm_data_mem_sw_noaccess 1 1 100.00
otbn_sw_no_acc 7.000s 107.350us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
otbn_single 14.000s 138.836us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 174.000s 1012.051us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
otbn_stress_all_with_rand_reset 102.000s 1890.632us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
otbn_smoke_vectorized 6.000s 61.563us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_vseq.sv:1237) [otbn_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
otbn_stress_all_with_rand_reset 45572513903104806909963433015616513478825738124003119108033812228449715078800 326
UVM_INFO @ 1890632480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.u_otbn_core.u_otbn_rnd.u_xoshiro256pp.xoshiro_q cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)
otbn_zero_state_err_urnd 104318410213368770776841920589413493617104004736304209090081366582676362349281 103
UVM_INFO @ 12983991 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.edn_urnd_ack cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)
otbn_urnd_err 37917365823633908393191729926852042283663788013577087129038510635778749071758 103
UVM_INFO @ 11230712 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---