Simulation Results: ac_range_check

 
30/04/2026 19:39:18 DVSim: v1.33.0 sha: c776b8b json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 82.98 %
  • code
  • 93.18 %
  • assert
  • 97.75 %
  • func
  • 58.02 %
  • block
  • 99.10 %
  • line
  • 99.93 %
  • branch
  • 98.24 %
  • toggle
  • 81.36 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 22.000s 1212.508us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 34.000s 631.648us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 2.000s 44.635us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 2.000s 71.185us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 21.000s 502.454us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 15.000s 1491.416us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 1.000s 50.926us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 2.000s 71.185us 1 1 100.00
ac_range_check_csr_aliasing 15.000s 1491.416us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 2.000s 275.946us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 28.000s 9595.144us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 123.000s 5466.949us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 2.000s 77.642us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 2.000s 38.511us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 3.000s 136.801us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 3.000s 136.801us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 44.635us 1 1 100.00
ac_range_check_csr_rw 2.000s 71.185us 1 1 100.00
ac_range_check_csr_aliasing 15.000s 1491.416us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 269.950us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 44.635us 1 1 100.00
ac_range_check_csr_rw 2.000s 71.185us 1 1 100.00
ac_range_check_csr_aliasing 15.000s 1491.416us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 269.950us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 874.801us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 874.801us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 874.801us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 874.801us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 77.000s 3913.572us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 1.000s 29.104us 1 1 100.00
ac_range_check_tl_intg_err 8.000s 364.056us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 281.000s 4061.021us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 23.000s 4947.396us 1 1 100.00