Simulation Results: kmac/unmasked

 
30/04/2026 19:39:18 DVSim: v1.33.0 sha: c776b8b json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 93.38 %
  • code
  • 89.45 %
  • assert
  • 97.90 %
  • func
  • 92.78 %
  • line
  • 97.43 %
  • branch
  • 95.28 %
  • cond
  • 94.19 %
  • toggle
  • 100.00 %
  • FSM
  • 60.33 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 18.460s 6409.984us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.880s 20.500us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.220s 68.670us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.510s 1947.481us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 9.780s 2405.834us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.880s 42.315us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.220s 68.670us 1 1 100.00
kmac_csr_aliasing 9.780s 2405.834us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.640s 33.757us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.720s 239.067us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1055.450s 59840.328us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 193.260s 2992.120us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1253.000s 71161.786us 1 1 100.00
kmac_test_vectors_sha3_256 21.440s 577.888us 1 1 100.00
kmac_test_vectors_sha3_384 16.280s 419.726us 1 1 100.00
kmac_test_vectors_sha3_512 10.320s 539.225us 1 1 100.00
kmac_test_vectors_shake_128 183.030s 57226.460us 1 1 100.00
kmac_test_vectors_shake_256 87.720s 4767.900us 1 1 100.00
kmac_test_vectors_kmac 1.700s 79.700us 1 1 100.00
kmac_test_vectors_kmac_xof 2.410s 1918.089us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 306.190s 24980.888us 1 1 100.00
app 1 1 100.00
kmac_app 79.100s 1939.005us 1 1 100.00
app_with_partial_data 1 1 100.00
kmac_app_with_partial_data 203.270s 53999.934us 1 1 100.00
entropy_refresh 1 1 100.00
kmac_entropy_refresh 58.850s 61781.924us 1 1 100.00
error 1 1 100.00
kmac_error 192.010s 7319.150us 1 1 100.00
key_error 1 1 100.00
kmac_key_error 6.150s 5290.365us 1 1 100.00
sideload_invalid 1 1 100.00
kmac_sideload_invalid 2.770s 79.231us 1 1 100.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 10.350s 223.674us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 16.470s 295.550us 1 1 100.00
entropy_ready_error 1 1 100.00
kmac_entropy_ready_error 14.510s 2463.964us 1 1 100.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.270s 208.446us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 737.920s 151218.361us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 1.020s 17.202us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.040s 16.205us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.890s 539.451us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.890s 539.451us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.880s 20.500us 1 1 100.00
kmac_csr_rw 1.220s 68.670us 1 1 100.00
kmac_csr_aliasing 9.780s 2405.834us 1 1 100.00
kmac_same_csr_outstanding 1.210s 24.505us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.880s 20.500us 1 1 100.00
kmac_csr_rw 1.220s 68.670us 1 1 100.00
kmac_csr_aliasing 9.780s 2405.834us 1 1 100.00
kmac_same_csr_outstanding 1.210s 24.505us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.780s 272.134us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.780s 272.134us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.780s 272.134us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.780s 272.134us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 1.820s 108.964us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 54.300s 11109.457us 1 1 100.00
kmac_tl_intg_err 3.090s 447.305us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.090s 447.305us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.270s 208.446us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 18.460s 6409.984us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 306.190s 24980.888us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.780s 272.134us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 54.300s 11109.457us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 54.300s 11109.457us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 54.300s 11109.457us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 18.460s 6409.984us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.270s 208.446us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 54.300s 11109.457us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 1 1 100.00
kmac_mubi 201.950s 8807.383us 1 1 100.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 18.460s 6409.984us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 59.520s 1390.249us 1 1 100.00