Simulation Results: mbx

 
04/05/2026 19:40:26 DVSim: v1.33.1 sha: c46226f json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.44 %
  • code
  • 90.18 %
  • assert
  • 96.86 %
  • func
  • 75.29 %
  • block
  • 95.74 %
  • line
  • 96.02 %
  • branch
  • 88.65 %
  • toggle
  • 85.88 %
Validation stages
V1
83.33%
V2
72.73%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 39.000s 23855.950us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 27.078us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 14.054us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 4.000s 1028.595us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 2.000s 35.626us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 1.000s 8.645us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 14.054us 1 1 100.00
mbx_csr_aliasing 2.000s 35.626us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 1 1 100.00
mbx_stress 89.000s 64933.049us 1 1 100.00
mbx_max_activity 0 1 0.00
mbx_stress_zero_delays 4.000s 154.397us 0 1 0.00
mbx_imbx_oob 0 1 0.00
mbx_imbx_oob 4.000s 302.279us 0 1 0.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 17.000s 694.010us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 2.000s 27.895us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 1.000s 18.883us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 2.000s 2.702us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 2.000s 2.702us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 27.078us 1 1 100.00
mbx_csr_rw 1.000s 14.054us 1 1 100.00
mbx_csr_aliasing 2.000s 35.626us 1 1 100.00
mbx_same_csr_outstanding 1.000s 40.938us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 27.078us 1 1 100.00
mbx_csr_rw 1.000s 14.054us 1 1 100.00
mbx_csr_aliasing 2.000s 35.626us 1 1 100.00
mbx_same_csr_outstanding 1.000s 40.938us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 2.000s 402.004us 1 1 100.00
mbx_sec_cm 1.000s 31.906us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (mbx_scoreboard.sv:500) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) RDATA read data mismatched
mbx_stress_zero_delays 70220515151199976608683065956346529958021566740991803034664082517752273712908 276
UVM_INFO @ 154397285 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register
mbx_imbx_oob 114751469282012235943599863692267517929154195087297179328104316995546688899592 111
UVM_INFO @ 302278927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:582) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *).
mbx_tl_errors 407415660586705503705687673892445080228307637868837629338216406822722946553 85
TL item was: req: (cip_tl_seq_item@15632) { a_addr: 'h968dcbf4 a_data: 'hfae466f0 a_mask: 'h0 a_size: 'h0 a_param: 'h0 a_source: 'h3c a_opcode: 'h1 a_user: 'h24654 d_param: 'h0 d_source: 'h3c d_data: 'h0 d_size: 'h0 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h152a a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 2701870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 22040889550827097262816417247750340017462261697982040204635933791100944148112 86
TL item was: req: (cip_tl_seq_item@18723) { a_addr: 'hfad9f3b0 a_data: 'hbb2021f6 a_mask: 'h7 a_size: 'h2 a_param: 'h0 a_source: 'h60 a_opcode: 'h1 a_user: 'h268e0 d_param: 'h0 d_source: 'h60 d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 8644899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---