Simulation Results: prim_esc

 
04/05/2026 19:40:26 DVSim: v1.33.1 sha: c46226f json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.60 %
  • code
  • 86.01 %
  • assert
  • 85.19 %
  • line
  • 90.83 %
  • branch
  • 80.00 %
  • cond
  • 87.80 %
  • toggle
  • 100.00 %
  • FSM
  • 71.43 %
Validation stages
V1
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
prim_esc_request_test 1 1 100.00
prim_esc_test 0.460s 4.849us 1 1 100.00
prim_ping_req_interrupted_by_esc_req_test 1 1 100.00
prim_esc_test 0.460s 4.849us 1 1 100.00
prim_esc_tx_integrity_errors_test 1 1 100.00
prim_esc_test 0.460s 4.849us 1 1 100.00
prim_esc_reverse_ping_timeout_test 1 1 100.00
prim_esc_test 0.460s 4.849us 1 1 100.00
prim_esc_receiver_counter_fail_test 1 1 100.00
prim_esc_test 0.460s 4.849us 1 1 100.00
prim_esc_handshake_with_rand_reset_test 1 1 100.00
prim_esc_test 0.460s 4.849us 1 1 100.00