Simulation Results: otbn

 
05/05/2026 19:39:24 DVSim: v1.34.0 sha: abb01fa json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 94.06 %
  • code
  • 95.26 %
  • assert
  • 89.88 %
  • func
  • 97.03 %
  • block
  • 99.39 %
  • line
  • 99.57 %
  • branch
  • 92.25 %
  • toggle
  • 91.77 %
  • FSM
  • 97.44 %
Validation stages
V1
100.00%
V2
92.86%
V2S
92.00%
V3
0.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
otbn_smoke 11.000s 48.303us 1 1 100.00
single_binary 1 1 100.00
otbn_single 6.000s 68.382us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 3.000s 16.789us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 3.000s 58.567us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 6.000s 36.088us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 4.000s 24.488us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 5.000s 41.118us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 3.000s 58.567us 1 1 100.00
otbn_csr_aliasing 4.000s 24.488us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 45.000s 2632.162us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 22.000s 1329.690us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 1 1 100.00
otbn_reset 35.000s 124.359us 1 1 100.00
multi_error 1 1 100.00
otbn_multi_err 83.000s 341.374us 1 1 100.00
back_to_back 1 1 100.00
otbn_multi 32.000s 287.592us 1 1 100.00
stress_all 1 1 100.00
otbn_stress_all 51.000s 323.675us 1 1 100.00
lc_escalation 1 1 100.00
otbn_escalate 10.000s 112.841us 1 1 100.00
zero_state_err_urnd 0 1 0.00
otbn_zero_state_err_urnd 4.000s 2.549us 0 1 0.00
sw_errs_fatal_chk 1 1 100.00
otbn_sw_errs_fatal_chk 14.000s 58.098us 1 1 100.00
alert_test 1 1 100.00
otbn_alert_test 4.000s 31.895us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 4.000s 17.704us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 5.000s 83.274us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 5.000s 83.274us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 3.000s 16.789us 1 1 100.00
otbn_csr_rw 3.000s 58.567us 1 1 100.00
otbn_csr_aliasing 4.000s 24.488us 1 1 100.00
otbn_same_csr_outstanding 4.000s 20.980us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 3.000s 16.789us 1 1 100.00
otbn_csr_rw 3.000s 58.567us 1 1 100.00
otbn_csr_aliasing 4.000s 24.488us 1 1 100.00
otbn_same_csr_outstanding 4.000s 20.980us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 2 2 100.00
otbn_imem_err 6.000s 30.278us 1 1 100.00
otbn_dmem_err 11.000s 219.625us 1 1 100.00
internal_integrity 3 4 75.00
otbn_alu_bignum_mod_err 19.000s 61.322us 1 1 100.00
otbn_controller_ispr_rdata_err 6.000s 34.278us 1 1 100.00
otbn_mac_bignum_acc_err 8.000s 61.590us 1 1 100.00
otbn_urnd_err 4.000s 5.446us 0 1 0.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 6.000s 107.138us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 5.000s 33.315us 1 1 100.00
otbn_non_sec_partial_wipe 1 1 100.00
otbn_partial_wipe 5.000s 28.872us 1 1 100.00
tl_intg_err 2 2 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
otbn_tl_intg_err 15.000s 102.928us 1 1 100.00
passthru_mem_tl_intg_err 1 1 100.00
otbn_passthru_mem_tl_intg_err 22.000s 200.731us 1 1 100.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 11.000s 48.303us 1 1 100.00
sec_cm_data_mem_integrity 1 1 100.00
otbn_dmem_err 11.000s 219.625us 1 1 100.00
sec_cm_instruction_mem_integrity 1 1 100.00
otbn_imem_err 6.000s 30.278us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 15.000s 102.928us 1 1 100.00
sec_cm_controller_fsm_global_esc 1 1 100.00
otbn_escalate 10.000s 112.841us 1 1 100.00
sec_cm_controller_fsm_local_esc 4 5 80.00
otbn_imem_err 6.000s 30.278us 1 1 100.00
otbn_dmem_err 11.000s 219.625us 1 1 100.00
otbn_zero_state_err_urnd 4.000s 2.549us 0 1 0.00
otbn_illegal_mem_acc 6.000s 107.138us 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 6.000s 68.382us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 6.000s 30.278us 1 1 100.00
otbn_dmem_err 11.000s 219.625us 1 1 100.00
otbn_zero_state_err_urnd 4.000s 2.549us 0 1 0.00
otbn_illegal_mem_acc 6.000s 107.138us 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 1 1 100.00
otbn_escalate 10.000s 112.841us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 6.000s 30.278us 1 1 100.00
otbn_dmem_err 11.000s 219.625us 1 1 100.00
otbn_zero_state_err_urnd 4.000s 2.549us 0 1 0.00
otbn_illegal_mem_acc 6.000s 107.138us 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 6.000s 68.382us 1 1 100.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 7.000s 26.871us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 5.000s 21.358us 1 1 100.00
sec_cm_rnd_bus_consistency 1 1 100.00
otbn_rnd_sec_cm 22.000s 66.743us 1 1 100.00
sec_cm_rnd_rng_digest 1 1 100.00
otbn_rnd_sec_cm 22.000s 66.743us 1 1 100.00
sec_cm_rf_base_data_reg_sw_integrity 1 1 100.00
otbn_rf_base_intg_err 7.000s 18.295us 1 1 100.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 1 1 100.00
otbn_rf_bignum_intg_err 6.000s 99.314us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
sec_cm_loop_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 7.000s 61.493us 1 1 100.00
sec_cm_call_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 7.000s 61.493us 1 1 100.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 4.000s 43.094us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 6.000s 68.382us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 6.000s 68.382us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 6.000s 68.382us 1 1 100.00
sec_cm_write_mem_integrity 1 1 100.00
otbn_multi 32.000s 287.592us 1 1 100.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 6.000s 68.382us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 6.000s 68.382us 1 1 100.00
sec_cm_data_mem_sw_noaccess 1 1 100.00
otbn_sw_no_acc 9.000s 31.140us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
otbn_single 6.000s 68.382us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 358.000s 2880.864us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
otbn_stress_all_with_rand_reset 60.000s 735.786us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
otbn_smoke_vectorized 6.000s 66.818us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_vseq.sv:1237) [otbn_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 1 test run
otbn_stress_all_with_rand_reset 33202649884705114303700887547757113455939244695403938271292806540970898303601 252
UVM_INFO @ 735786091 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.u_otbn_core.u_otbn_rnd.u_xoshiro256pp.xoshiro_q cannot be resolved to a hdl object (vlog,vhdl,vlog-slice) 1 test run
otbn_zero_state_err_urnd 6856943024616089225697179251149448750926520330022227200826914084382744879939 105
UVM_INFO @ 2549276 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.edn_urnd_ack cannot be resolved to a hdl object (vlog,vhdl,vlog-slice) 1 test run
otbn_urnd_err 98143838637775999133774954769528949549353270285150330383672609738219579618250 110
UVM_INFO @ 5446387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---