Simulation Results: entropy_src/rng_16bits

 
06/05/2026 19:39:25 DVSim: v1.34.0 sha: 96721aa json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 68.41 %
  • code
  • 82.62 %
  • assert
  • 72.94 %
  • func
  • 49.66 %
  • block
  • 94.26 %
  • line
  • 98.01 %
  • branch
  • 86.24 %
  • toggle
  • 52.50 %
  • FSM
  • 93.75 %
Validation stages
V1
100.00%
V2
93.75%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 21.260us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 36.147us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 21.527us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 7.000s 158.010us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 3.000s 525.444us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
entropy_src_csr_mem_rw_with_rand_reset 1.000s 129.435us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 21.527us 1 1 100.00
entropy_src_csr_aliasing 3.000s 525.444us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 21.260us 1 1 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
entropy_src_fw_ov 95.000s 14311.645us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 95.000s 14311.645us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
rng_max_rate 0 1 0.00
entropy_src_rng_max_rate 73.000s 4480.648us 0 1 0.00
health_checks 1 1 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
entropy_src_intr 3.000s 88.724us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
entropy_src_functional_alerts 6.000s 175.319us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 34.000s 13888.558us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 3.000s 96.497us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 8.000s 491.432us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 78.992us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 18.109us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 114.886us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 114.886us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 36.147us 1 1 100.00
entropy_src_csr_rw 2.000s 21.527us 1 1 100.00
entropy_src_csr_aliasing 3.000s 525.444us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 73.759us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 36.147us 1 1 100.00
entropy_src_csr_rw 2.000s 21.527us 1 1 100.00
entropy_src_csr_aliasing 3.000s 525.444us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 73.759us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 55.345us 1 1 100.00
entropy_src_tl_intg_err 3.000s 279.613us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
entropy_src_cfg_regwen 2.000s 21.230us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
entropy_src_fw_ov 95.000s 14311.645us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 3.000s 96.497us 1 1 100.00
entropy_src_sec_cm 2.000s 55.345us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 3.000s 96.497us 1 1 100.00
entropy_src_sec_cm 2.000s 55.345us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 334.000s 13048.900us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 3.000s 96.497us 1 1 100.00
entropy_src_sec_cm 2.000s 55.345us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 3.000s 96.497us 1 1 100.00
entropy_src_sec_cm 2.000s 55.345us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 3.000s 96.497us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 6.000s 175.319us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 3.000s 279.613us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 57.000s 14074.593us 1 1 100.00

Error Messages

   Test seed line log context
UVM_FATAL (entropy_src_scoreboard.sv:2904) [scoreboard] Check failed match_found == * (* [*] vs * [*]) All candidate csrng seeds have been checked, with no match 1 test run
entropy_src_rng_max_rate 76074355562927176745660096324922088331848470562792891625624182987323593107860 1421
UVM_INFO @ 4480647663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---