Simulation Results: mbx

 
12/05/2026 19:39:19 DVSim: v1.34.0 sha: b76d9ad json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 89.41 %
  • code
  • 91.41 %
  • assert
  • 97.05 %
  • func
  • 79.77 %
  • block
  • 96.82 %
  • line
  • 96.64 %
  • branch
  • 91.71 %
  • toggle
  • 85.88 %
Validation stages
V1
83.33%
V2
81.82%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 24.000s 4573.261us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 44.759us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 2.000s 40.911us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 4.000s 519.665us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 2.000s 18.918us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 1.000s 7.154us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 2.000s 40.911us 1 1 100.00
mbx_csr_aliasing 2.000s 18.918us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 0 1 0.00
mbx_stress 5.000s 513.320us 0 1 0.00
mbx_max_activity 1 1 100.00
mbx_stress_zero_delays 92.000s 6304.807us 1 1 100.00
mbx_imbx_oob 1 1 100.00
mbx_imbx_oob 66.000s 3933.937us 1 1 100.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 18.000s 537.277us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 1.000s 29.719us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 1.000s 42.966us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 2.000s 47.503us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 2.000s 47.503us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 44.759us 1 1 100.00
mbx_csr_rw 2.000s 40.911us 1 1 100.00
mbx_csr_aliasing 2.000s 18.918us 1 1 100.00
mbx_same_csr_outstanding 1.000s 23.931us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 44.759us 1 1 100.00
mbx_csr_rw 2.000s 40.911us 1 1 100.00
mbx_csr_aliasing 2.000s 18.918us 1 1 100.00
mbx_same_csr_outstanding 1.000s 23.931us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 3.000s 421.772us 1 1 100.00
mbx_sec_cm 1.000s 20.593us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:582) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *). 2 test runs
mbx_tl_errors 94223469470750704347397671582914261437489938271725161756967324230813681429213 85
TL item was: req: (cip_tl_seq_item@22383) { a_addr: 'h805b2bd4 a_data: 'h10a5b8b a_mask: 'hb a_size: 'h2 a_param: 'h0 a_source: 'he6 a_opcode: 'h1 a_user: 'h276d7 d_param: 'h0 d_source: 'he6 d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 47502961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 91370086844113717099711623244311062702436805657285246026762589371461094588501 86
TL item was: req: (cip_tl_seq_item@21575) { a_addr: 'h52cc76d4 a_data: 'h528c8f34 a_mask: 'h0 a_size: 'h1 a_param: 'h0 a_source: 'h3f a_opcode: 'h1 a_user: 'h26384 d_param: 'h0 d_source: 'h3f d_data: 'h0 d_size: 'h1 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h10aa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 7154150 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (mbx_scoreboard.sv:500) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) RDATA read data mismatched 1 test run
mbx_stress 53881017894955414477327129696078452918084795921177426024505861857504633688055 435
UVM_INFO @ 513319701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---