Simulation Results: kmac/masked

 
13/05/2026 20:59:34 DVSim: v1.34.0 sha: cadc156 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 94.84 %
  • code
  • 91.27 %
  • assert
  • 97.98 %
  • func
  • 95.27 %
  • line
  • 98.91 %
  • branch
  • 96.69 %
  • cond
  • 93.95 %
  • toggle
  • 99.89 %
  • FSM
  • 66.90 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 45.680s 8927.526us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.020s 64.861us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.000s 26.663us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 7.070s 2883.360us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 5.550s 134.613us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.070s 43.281us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.000s 26.663us 1 1 100.00
kmac_csr_aliasing 5.550s 134.613us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.860s 13.250us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.220s 106.609us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2211.520s 63038.508us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 609.750s 18694.922us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 2196.230s 419064.427us 1 1 100.00
kmac_test_vectors_sha3_256 29.700s 2327.493us 1 1 100.00
kmac_test_vectors_sha3_384 18.920s 3638.386us 1 1 100.00
kmac_test_vectors_sha3_512 970.260s 32537.728us 1 1 100.00
kmac_test_vectors_shake_128 2220.580s 352211.135us 1 1 100.00
kmac_test_vectors_shake_256 277.320s 53925.444us 1 1 100.00
kmac_test_vectors_kmac 2.280s 257.495us 1 1 100.00
kmac_test_vectors_kmac_xof 3.150s 229.038us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 253.370s 39855.118us 1 1 100.00
app 1 1 100.00
kmac_app 187.530s 42376.477us 1 1 100.00
app_with_partial_data 1 1 100.00
kmac_app_with_partial_data 72.260s 25821.525us 1 1 100.00
entropy_refresh 1 1 100.00
kmac_entropy_refresh 262.160s 18331.896us 1 1 100.00
error 1 1 100.00
kmac_error 115.120s 3641.521us 1 1 100.00
key_error 1 1 100.00
kmac_key_error 7.870s 1349.752us 1 1 100.00
sideload_invalid 1 1 100.00
kmac_sideload_invalid 5.960s 322.515us 1 1 100.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 1.190s 82.539us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 1.370s 27.698us 1 1 100.00
entropy_ready_error 1 1 100.00
kmac_entropy_ready_error 47.170s 6268.161us 1 1 100.00
lc_escalation 1 1 100.00
kmac_lc_escalation 9.230s 1148.064us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 971.200s 32219.866us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.900s 17.956us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.800s 70.165us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 3.400s 57.132us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 3.400s 57.132us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.020s 64.861us 1 1 100.00
kmac_csr_rw 1.000s 26.663us 1 1 100.00
kmac_csr_aliasing 5.550s 134.613us 1 1 100.00
kmac_same_csr_outstanding 1.780s 107.327us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.020s 64.861us 1 1 100.00
kmac_csr_rw 1.000s 26.663us 1 1 100.00
kmac_csr_aliasing 5.550s 134.613us 1 1 100.00
kmac_same_csr_outstanding 1.780s 107.327us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.620s 87.928us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.620s 87.928us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.620s 87.928us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.620s 87.928us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 4.670s 534.635us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 68.570s 6673.432us 1 1 100.00
kmac_tl_intg_err 2.880s 715.785us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.880s 715.785us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 9.230s 1148.064us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 45.680s 8927.526us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 253.370s 39855.118us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.620s 87.928us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 68.570s 6673.432us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 68.570s 6673.432us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 68.570s 6673.432us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 45.680s 8927.526us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 9.230s 1148.064us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 68.570s 6673.432us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 1 1 100.00
kmac_mubi 89.370s 11060.597us 1 1 100.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 45.680s 8927.526us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 114.960s 2688.316us 1 1 100.00