Simulation Results: kmac/unmasked

 
13/05/2026 20:59:34 DVSim: v1.34.0 sha: cadc156 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 93.43 %
  • code
  • 89.89 %
  • assert
  • 97.90 %
  • func
  • 92.50 %
  • line
  • 97.52 %
  • branch
  • 95.85 %
  • cond
  • 94.11 %
  • toggle
  • 100.00 %
  • FSM
  • 61.98 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 10.140s 491.238us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.240s 36.611us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.160s 32.833us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 16.090s 1261.969us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 4.440s 196.862us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.410s 1057.010us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.160s 32.833us 1 1 100.00
kmac_csr_aliasing 4.440s 196.862us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.730s 20.294us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.650s 63.731us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1602.440s 302101.064us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 450.620s 7375.172us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1703.750s 61800.079us 1 1 100.00
kmac_test_vectors_sha3_256 28.040s 6630.700us 1 1 100.00
kmac_test_vectors_sha3_384 20.930s 1217.651us 1 1 100.00
kmac_test_vectors_sha3_512 595.900s 12301.555us 1 1 100.00
kmac_test_vectors_shake_128 120.590s 6668.126us 1 1 100.00
kmac_test_vectors_shake_256 1904.030s 91709.520us 1 1 100.00
kmac_test_vectors_kmac 2.110s 38.619us 1 1 100.00
kmac_test_vectors_kmac_xof 2.230s 133.709us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 321.810s 21337.990us 1 1 100.00
app 1 1 100.00
kmac_app 93.100s 2466.517us 1 1 100.00
app_with_partial_data 1 1 100.00
kmac_app_with_partial_data 88.160s 3611.858us 1 1 100.00
entropy_refresh 1 1 100.00
kmac_entropy_refresh 67.410s 6262.690us 1 1 100.00
error 1 1 100.00
kmac_error 109.450s 2897.520us 1 1 100.00
key_error 1 1 100.00
kmac_key_error 4.060s 853.751us 1 1 100.00
sideload_invalid 1 1 100.00
kmac_sideload_invalid 2.190s 376.450us 1 1 100.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 7.000s 379.883us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 13.200s 3035.767us 1 1 100.00
entropy_ready_error 1 1 100.00
kmac_entropy_ready_error 28.560s 8006.519us 1 1 100.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.290s 115.833us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 65.010s 1826.178us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 1.010s 45.468us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.940s 18.083us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 3.080s 170.294us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 3.080s 170.294us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.240s 36.611us 1 1 100.00
kmac_csr_rw 1.160s 32.833us 1 1 100.00
kmac_csr_aliasing 4.440s 196.862us 1 1 100.00
kmac_same_csr_outstanding 2.220s 718.993us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.240s 36.611us 1 1 100.00
kmac_csr_rw 1.160s 32.833us 1 1 100.00
kmac_csr_aliasing 4.440s 196.862us 1 1 100.00
kmac_same_csr_outstanding 2.220s 718.993us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.660s 76.994us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.660s 76.994us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.660s 76.994us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.660s 76.994us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 4.270s 141.325us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 39.870s 5178.991us 1 1 100.00
kmac_tl_intg_err 5.080s 497.173us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 5.080s 497.173us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.290s 115.833us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 10.140s 491.238us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 321.810s 21337.990us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.660s 76.994us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 39.870s 5178.991us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 39.870s 5178.991us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 39.870s 5178.991us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 10.140s 491.238us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.290s 115.833us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 39.870s 5178.991us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 1 1 100.00
kmac_mubi 62.070s 4219.698us 1 1 100.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 10.140s 491.238us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 54.200s 3777.792us 1 1 100.00