Simulation Results: aes/gcm_masked

 
25/05/2026 19:40:27 DVSim: v1.49.1 sha: f988e3e json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.33 %
  • code
  • 96.30 %
  • assert
  • 98.43 %
  • func
  • 67.28 %
  • block
  • 96.50 %
  • line
  • 97.54 %
  • branch
  • 91.53 %
  • toggle
  • 98.05 %
  • FSM
  • 98.06 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 70.770us 1 1 100.00
smoke 1 1 100.00
aes_smoke 4.000s 169.079us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 1.000s 93.637us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 83.310us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 5.000s 239.964us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 541.524us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 134.331us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 83.310us 1 1 100.00
aes_csr_aliasing 3.000s 541.524us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 4.000s 169.079us 1 1 100.00
aes_config_error 2.000s 70.911us 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
key_length 3 3 100.00
aes_smoke 4.000s 169.079us 1 1 100.00
aes_config_error 2.000s 70.911us 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
back2back 2 2 100.00
aes_stress 4.000s 80.188us 1 1 100.00
aes_b2b 21.000s 334.905us 1 1 100.00
backpressure 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 4.000s 169.079us 1 1 100.00
aes_config_error 2.000s 70.911us 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
aes_alert_reset 4.000s 233.656us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 81.449us 1 1 100.00
aes_config_error 2.000s 70.911us 1 1 100.00
aes_alert_reset 4.000s 233.656us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 92.000s 3931.729us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 9.000s 1027.540us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 9.000s 586.520us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 4.000s 233.656us 1 1 100.00
stress 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
sideload 2 2 100.00
aes_stress 4.000s 80.188us 1 1 100.00
aes_sideload 3.000s 553.737us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 115.899us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 326.000s 20629.524us 1 1 100.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 3.000s 92.458us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 73.371us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 356.692us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 356.692us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 1.000s 93.637us 1 1 100.00
aes_csr_rw 2.000s 83.310us 1 1 100.00
aes_csr_aliasing 3.000s 541.524us 1 1 100.00
aes_same_csr_outstanding 2.000s 127.668us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 1.000s 93.637us 1 1 100.00
aes_csr_rw 2.000s 83.310us 1 1 100.00
aes_csr_aliasing 3.000s 541.524us 1 1 100.00
aes_same_csr_outstanding 2.000s 127.668us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 3.000s 110.882us 1 1 100.00
fault_inject 3 3 100.00
aes_fi 4.000s 218.191us 1 1 100.00
aes_control_fi 2.000s 68.001us 1 1 100.00
aes_cipher_fi 2.000s 115.923us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 187.961us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 187.961us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 187.961us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 187.961us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 2.000s 84.966us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 5.000s 663.030us 1 1 100.00
aes_tl_intg_err 2.000s 156.913us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 156.913us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 4.000s 233.656us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 187.961us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 187.961us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 4.000s 169.079us 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
aes_alert_reset 4.000s 233.656us 1 1 100.00
aes_core_fi 3.000s 75.860us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 3.000s 92.458us 1 1 100.00
aes_config_error 2.000s 70.911us 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
aes_core_fi 3.000s 75.860us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 187.961us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 83.528us 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 4.000s 80.188us 1 1 100.00
aes_sideload 3.000s 553.737us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 83.528us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 83.528us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 83.528us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 83.528us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 83.528us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 4.000s 80.188us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 4.000s 218.191us 1 1 100.00
sec_cm_main_fsm_redun 4 4 100.00
aes_fi 4.000s 218.191us 1 1 100.00
aes_control_fi 2.000s 68.001us 1 1 100.00
aes_cipher_fi 2.000s 115.923us 1 1 100.00
aes_ctr_fi 3.000s 61.151us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 4.000s 218.191us 1 1 100.00
sec_cm_cipher_fsm_redun 3 3 100.00
aes_fi 4.000s 218.191us 1 1 100.00
aes_control_fi 2.000s 68.001us 1 1 100.00
aes_cipher_fi 2.000s 115.923us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 115.923us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 4.000s 218.191us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 4.000s 218.191us 1 1 100.00
aes_control_fi 2.000s 68.001us 1 1 100.00
aes_ctr_fi 3.000s 61.151us 1 1 100.00
sec_cm_ghash_fsm_sparse 1 1 100.00
aes_fi 4.000s 218.191us 1 1 100.00
sec_cm_ctrl_sparse 4 4 100.00
aes_fi 4.000s 218.191us 1 1 100.00
aes_control_fi 2.000s 68.001us 1 1 100.00
aes_cipher_fi 2.000s 115.923us 1 1 100.00
aes_ctr_fi 3.000s 61.151us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 4.000s 233.656us 1 1 100.00
sec_cm_main_fsm_local_esc 4 4 100.00
aes_fi 4.000s 218.191us 1 1 100.00
aes_control_fi 2.000s 68.001us 1 1 100.00
aes_cipher_fi 2.000s 115.923us 1 1 100.00
aes_ctr_fi 3.000s 61.151us 1 1 100.00
sec_cm_cipher_fsm_local_esc 4 4 100.00
aes_fi 4.000s 218.191us 1 1 100.00
aes_control_fi 2.000s 68.001us 1 1 100.00
aes_cipher_fi 2.000s 115.923us 1 1 100.00
aes_ctr_fi 3.000s 61.151us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 4.000s 218.191us 1 1 100.00
aes_control_fi 2.000s 68.001us 1 1 100.00
aes_ctr_fi 3.000s 61.151us 1 1 100.00
sec_cm_ghash_fsm_local_esc 2 2 100.00
aes_ghash_fi 2.000s 50.844us 1 1 100.00
aes_fi 4.000s 218.191us 1 1 100.00
sec_cm_data_reg_local_esc 3 3 100.00
aes_fi 4.000s 218.191us 1 1 100.00
aes_control_fi 2.000s 68.001us 1 1 100.00
aes_cipher_fi 2.000s 115.923us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 5.000s 78.988us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (aes_base_vseq.sv:307) virtual_sequencer [aes_stress_vseq] Expected GCM phase GCM_AAD, got GCM_TEXT 1 test run
aes_stress_all_with_rand_reset 107996501776192507772769095637456694218680820490321263846732409243714321914061 185
UVM_INFO @ 78987919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---