| V1 |
|
100.00% |
| V2 |
|
94.12% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_smoke | 1 | 1 | 100.00 | |||
| xbar_smoke | 4.350s | 86.651us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| xbar_base_random_sequence | 1 | 1 | 100.00 | |||
| xbar_random | 22.730s | 288.130us | 1 | 1 | 100.00 | |
| xbar_random_delay | 6 | 6 | 100.00 | |||
| xbar_smoke_zero_delays | 5.350s | 60.640us | 1 | 1 | 100.00 | |
| xbar_smoke_large_delays | 224.240s | 181988.060us | 1 | 1 | 100.00 | |
| xbar_smoke_slow_rsp | 217.330s | 16886.256us | 1 | 1 | 100.00 | |
| xbar_random_zero_delays | 43.330s | 305.829us | 1 | 1 | 100.00 | |
| xbar_random_large_delays | 778.770s | 342802.285us | 1 | 1 | 100.00 | |
| xbar_random_slow_rsp | 1501.260s | 147366.003us | 1 | 1 | 100.00 | |
| xbar_unmapped_address | 2 | 2 | 100.00 | |||
| xbar_unmapped_addr | 5.350s | 34.149us | 1 | 1 | 100.00 | |
| xbar_error_and_unmapped_addr | 30.330s | 151.462us | 1 | 1 | 100.00 | |
| xbar_error_cases | 2 | 2 | 100.00 | |||
| xbar_error_random | 4.200s | 35.913us | 1 | 1 | 100.00 | |
| xbar_error_and_unmapped_addr | 30.330s | 151.462us | 1 | 1 | 100.00 | |
| xbar_all_access_same_device | 1 | 2 | 50.00 | |||
| xbar_access_same_device | 226.280s | 19439.402us | 1 | 1 | 100.00 | |
| xbar_access_same_device_slow_rsp | 1463.810s | 600000.000us | 0 | 1 | 0.00 | |
| xbar_all_hosts_use_same_source_id | 1 | 1 | 100.00 | |||
| xbar_same_source | 57.240s | 822.616us | 1 | 1 | 100.00 | |
| xbar_stress_all | 2 | 2 | 100.00 | |||
| xbar_stress_all | 282.330s | 12499.969us | 1 | 1 | 100.00 | |
| xbar_stress_all_with_error | 91.750s | 4399.694us | 1 | 1 | 100.00 | |
| xbar_stress_with_reset | 2 | 2 | 100.00 | |||
| xbar_stress_all_with_rand_reset | 676.680s | 8332.846us | 1 | 1 | 100.00 | |
| xbar_stress_all_with_reset_error | 143.400s | 419.779us | 1 | 1 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue | 1 test run | |||
| xbar_access_same_device_slow_rsp | 56002892105971406165677009951535283036416485898229272779199133110008451982872 | 150 |
UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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