Simulation Results: keymgr_dpe

 
06/07/2026 19:39:26 DVSim: v1.49.12 sha: 0e745b4 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 55.96 %
  • code
  • 60.53 %
  • assert
  • 95.95 %
  • func
  • 11.40 %
  • block
  • 95.06 %
  • line
  • 95.43 %
  • branch
  • 84.18 %
  • toggle
  • 47.12 %
  • FSM
  • 15.38 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 0 1 0.00
keymgr_dpe_smoke 21.000s 2246.969us 0 1 0.00
csr_hw_reset 1 1 100.00
keymgr_dpe_csr_hw_reset 2.000s 69.969us 1 1 100.00
csr_rw 1 1 100.00
keymgr_dpe_csr_rw 2.000s 20.088us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_dpe_csr_bit_bash 7.000s 260.519us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_dpe_csr_aliasing 6.000s 249.421us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_dpe_csr_mem_rw_with_rand_reset 2.000s 50.088us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_dpe_csr_rw 2.000s 20.088us 1 1 100.00
keymgr_dpe_csr_aliasing 6.000s 249.421us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
intr_test 1 1 100.00
keymgr_dpe_intr_test 1.000s 49.943us 1 1 100.00
alert_test 1 1 100.00
keymgr_dpe_alert_test 1.000s 18.690us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_dpe_tl_errors 3.000s 109.418us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_dpe_tl_errors 3.000s 109.418us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_dpe_csr_hw_reset 2.000s 69.969us 1 1 100.00
keymgr_dpe_csr_rw 2.000s 20.088us 1 1 100.00
keymgr_dpe_csr_aliasing 6.000s 249.421us 1 1 100.00
keymgr_dpe_same_csr_outstanding 2.000s 39.356us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_dpe_csr_hw_reset 2.000s 69.969us 1 1 100.00
keymgr_dpe_csr_rw 2.000s 20.088us 1 1 100.00
keymgr_dpe_csr_aliasing 6.000s 249.421us 1 1 100.00
keymgr_dpe_same_csr_outstanding 2.000s 39.356us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
keymgr_dpe_sec_cm 9.000s 1343.446us 1 1 100.00
keymgr_dpe_tl_intg_err 6.000s 491.901us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_dpe_shadow_reg_errors 2.000s 273.997us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_dpe_shadow_reg_errors 2.000s 273.997us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_dpe_shadow_reg_errors 2.000s 273.997us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_dpe_shadow_reg_errors 2.000s 273.997us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_dpe_shadow_reg_errors_with_csr_rw 5.000s 260.817us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_dpe_sec_cm 9.000s 1343.446us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_dpe_sec_cm 9.000s 1343.446us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:354) scoreboard [scoreboard] alert recov_operation_err did not trigger max_delay:* 1 test run
keymgr_dpe_smoke 13234908610450890716193598704562351185329978201995829996567925054824685652386 4343
UVM_INFO @ 2246968678 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---