Simulation Results: rv_timer

 
06/07/2026 19:39:26 DVSim: v1.49.12 sha: 0e745b4 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 96.04 %
  • code
  • 90.45 %
  • assert
  • 98.10 %
  • func
  • 99.58 %
  • block
  • 99.10 %
  • line
  • 99.02 %
  • branch
  • 99.26 %
  • toggle
  • 73.08 %
Validation stages
V1
100.00%
V2
90.91%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
random 1 1 100.00
rv_timer_random 2.000s 321.549us 1 1 100.00
csr_hw_reset 1 1 100.00
rv_timer_csr_hw_reset 1.000s 26.416us 1 1 100.00
csr_rw 1 1 100.00
rv_timer_csr_rw 1.000s 66.018us 1 1 100.00
csr_bit_bash 1 1 100.00
rv_timer_csr_bit_bash 2.000s 181.872us 1 1 100.00
csr_aliasing 1 1 100.00
rv_timer_csr_aliasing 1.000s 100.347us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
rv_timer_csr_mem_rw_with_rand_reset 1.000s 23.788us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
rv_timer_csr_rw 1.000s 66.018us 1 1 100.00
rv_timer_csr_aliasing 1.000s 100.347us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
random_reset 0 1 0.00
rv_timer_random_reset 2.000s 400.817us 0 1 0.00
disabled 1 1 100.00
rv_timer_disabled 2.000s 5501.721us 1 1 100.00
cfg_update_on_fly 1 1 100.00
rv_timer_cfg_update_on_fly 195.000s 919140.298us 1 1 100.00
no_interrupt_test 1 1 100.00
rv_timer_cfg_update_on_fly 195.000s 919140.298us 1 1 100.00
stress 1 1 100.00
rv_timer_stress_all 3.000s 6494.526us 1 1 100.00
alert_test 1 1 100.00
rv_timer_alert_test 2.000s 79.728us 1 1 100.00
intr_test 1 1 100.00
rv_timer_intr_test 1.000s 45.123us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
rv_timer_tl_errors 2.000s 45.334us 1 1 100.00
tl_d_illegal_access 1 1 100.00
rv_timer_tl_errors 2.000s 45.334us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
rv_timer_csr_hw_reset 1.000s 26.416us 1 1 100.00
rv_timer_csr_rw 1.000s 66.018us 1 1 100.00
rv_timer_csr_aliasing 1.000s 100.347us 1 1 100.00
rv_timer_same_csr_outstanding 1.000s 15.532us 1 1 100.00
tl_d_partial_access 4 4 100.00
rv_timer_csr_hw_reset 1.000s 26.416us 1 1 100.00
rv_timer_csr_rw 1.000s 66.018us 1 1 100.00
rv_timer_csr_aliasing 1.000s 100.347us 1 1 100.00
rv_timer_same_csr_outstanding 1.000s 15.532us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
rv_timer_sec_cm 1.000s 360.855us 1 1 100.00
rv_timer_tl_intg_err 1.000s 91.720us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
rv_timer_tl_intg_err 1.000s 91.720us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
min_value 0 1 0.00
rv_timer_min 3.000s 1819.775us 0 1 0.00
max_value 0 1 0.00
rv_timer_max 1.000s 52.586us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
rv_timer_stress_all_with_rand_reset 1.000s 64.859us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (rv_timer_base_vseq.sv:165) [intr_state_spinwait] timeout rv_timer_reg_block.intr_state* (addr=*) == * 2 test runs
rv_timer_min 87037429933487933325582555937445555562459485238204429446467137880554384215767 84
UVM_INFO @ 1819775267 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
rv_timer_random_reset 84017743089807794108501186033762789526684961544926348057381204014176465933306 84
UVM_INFO @ 400817288 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (rv_timer_scoreboard.sv:231) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
rv_timer_max 16580077832216547763765214533938727166497983939848851580418804783651111227619 84
UVM_INFO @ 52586104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 1 test run
rv_timer_stress_all_with_rand_reset 104834530530014405014045399554847965806015421642594393989960357010203944058295 96
UVM_INFO @ 64859414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---