Simulation Results: kmac/masked

 
07/07/2026 19:48:27 DVSim: v1.49.12 sha: 32d4560 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.44 %
  • code
  • 68.64 %
  • assert
  • 95.92 %
  • func
  • 76.76 %
  • line
  • 95.43 %
  • branch
  • 89.44 %
  • cond
  • 85.01 %
  • toggle
  • 29.02 %
  • FSM
  • 44.30 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 25.150s 7097.914us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.330s 32.424us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.140s 22.806us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 6.940s 232.905us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 7.040s 434.056us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.450s 76.986us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.140s 22.806us 1 1 100.00
kmac_csr_aliasing 7.040s 434.056us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.690s 27.760us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.330s 36.822us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1121.980s 34059.003us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 37.780s 1207.938us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 36.210s 26436.226us 1 1 100.00
kmac_test_vectors_sha3_256 1640.460s 102215.100us 1 1 100.00
kmac_test_vectors_sha3_384 27.410s 2188.655us 1 1 100.00
kmac_test_vectors_sha3_512 14.120s 700.577us 1 1 100.00
kmac_test_vectors_shake_128 179.740s 54375.541us 1 1 100.00
kmac_test_vectors_shake_256 89.490s 3361.130us 1 1 100.00
kmac_test_vectors_kmac 1.980s 83.624us 1 1 100.00
kmac_test_vectors_kmac_xof 2.910s 279.603us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 35.320s 6036.406us 1 1 100.00
app 0 1 0.00
kmac_app 3.110s 419.464us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.160s 30.825us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 1.110s 12.951us 0 1 0.00
error 0 1 0.00
kmac_error 9.690s 1021.994us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.220s 145.434us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.160s 25.547us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 25.950s 1715.753us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 1.230s 47.321us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.360s 55.691us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.310s 163.587us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 842.260s 12937.388us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.750s 22.096us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.940s 31.438us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 3.530s 248.554us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 3.530s 248.554us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.330s 32.424us 1 1 100.00
kmac_csr_rw 1.140s 22.806us 1 1 100.00
kmac_csr_aliasing 7.040s 434.056us 1 1 100.00
kmac_same_csr_outstanding 1.500s 1011.609us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.330s 32.424us 1 1 100.00
kmac_csr_rw 1.140s 22.806us 1 1 100.00
kmac_csr_aliasing 7.040s 434.056us 1 1 100.00
kmac_same_csr_outstanding 1.500s 1011.609us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.370s 56.132us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.370s 56.132us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.370s 56.132us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.370s 56.132us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 1.790s 154.099us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 32.720s 3274.638us 1 1 100.00
kmac_tl_intg_err 4.090s 223.691us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 4.090s 223.691us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.310s 163.587us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 25.150s 7097.914us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 35.320s 6036.406us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.370s 56.132us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 32.720s 3274.638us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 32.720s 3274.638us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 32.720s 3274.638us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 25.150s 7097.914us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.310s 163.587us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 32.720s 3274.638us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 1.030s 65.045us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 25.150s 7097.914us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 4.430s 87.873us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 8 test runs
kmac_sideload_invalid 50711166144532939189820765264826611049311390177657803882780683443637789791849 76
UVM_INFO @ 25546654 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 76150688273927082574784355474741895169289313537599408575577864050459503327956 78
UVM_INFO @ 419464160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 73293092449761974122567877510820319104494677850624921374601351278467982029972 77
UVM_INFO @ 30824816 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 13311319638857478458313983525118475615926032112803020722058873469715572051839 77
UVM_INFO @ 12950602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 60473230566299214069445070530166913126573349521761083140123021708211943382001 81
UVM_INFO @ 1021994367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 53279178862541219902555840629000220630263188865187084361391623090195812181610 77
UVM_INFO @ 55691078 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 26766717257763634338145006026974050731128694782703879442556073024724049114040 246
UVM_INFO @ 12937387863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 40358407865600117633433060276393627065821080058005629605577355178387961803078 117
UVM_INFO @ 87872968 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 20938808585682575015612427679091370965726057548452359367894127427258625161192 77
UVM_INFO @ 65044979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 95565291752519628956528372992395254750706554411817194361396274944030086329554 78
UVM_ERROR @ 145434135 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 145434135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---