Simulation Results: kmac/unmasked

 
07/07/2026 19:48:27 DVSim: v1.49.12 sha: 32d4560 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 79.78 %
  • code
  • 67.31 %
  • assert
  • 97.37 %
  • func
  • 74.65 %
  • line
  • 93.86 %
  • branch
  • 88.43 %
  • cond
  • 85.11 %
  • toggle
  • 27.56 %
  • FSM
  • 41.61 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 14.720s 1447.125us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.200s 20.175us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.940s 27.556us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.350s 436.985us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 4.080s 228.128us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.940s 32.048us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.940s 27.556us 1 1 100.00
kmac_csr_aliasing 4.080s 228.128us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.700s 13.424us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.450s 45.059us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2188.800s 95741.977us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 371.540s 39144.296us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1418.570s 26311.730us 1 1 100.00
kmac_test_vectors_sha3_256 22.940s 3150.839us 1 1 100.00
kmac_test_vectors_sha3_384 27.010s 18894.783us 1 1 100.00
kmac_test_vectors_sha3_512 893.830s 51353.694us 1 1 100.00
kmac_test_vectors_shake_128 172.250s 16834.306us 1 1 100.00
kmac_test_vectors_shake_256 1300.690s 25916.253us 1 1 100.00
kmac_test_vectors_kmac 1.510s 36.328us 1 1 100.00
kmac_test_vectors_kmac_xof 2.180s 829.269us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 1.790s 46.082us 1 1 100.00
app 0 1 0.00
kmac_app 0.960s 29.900us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 0.970s 68.966us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 6.550s 485.189us 0 1 0.00
error 0 1 0.00
kmac_error 3.080s 659.909us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.190s 157.974us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.780s 7.026us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 19.480s 5414.490us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 4.630s 279.249us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.270s 51.374us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.140s 61.231us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 158.240s 9314.445us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.930s 52.810us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.060s 30.501us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.750s 135.745us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.750s 135.745us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.200s 20.175us 1 1 100.00
kmac_csr_rw 0.940s 27.556us 1 1 100.00
kmac_csr_aliasing 4.080s 228.128us 1 1 100.00
kmac_same_csr_outstanding 1.100s 112.906us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.200s 20.175us 1 1 100.00
kmac_csr_rw 0.940s 27.556us 1 1 100.00
kmac_csr_aliasing 4.080s 228.128us 1 1 100.00
kmac_same_csr_outstanding 1.100s 112.906us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.360s 196.156us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.360s 196.156us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.360s 196.156us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.360s 196.156us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.470s 104.959us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 28.040s 3559.023us 1 1 100.00
kmac_tl_intg_err 3.970s 419.934us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 3.970s 419.934us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.140s 61.231us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 14.720s 1447.125us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 1.790s 46.082us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.360s 196.156us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 28.040s 3559.023us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 28.040s 3559.023us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 28.040s 3559.023us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 14.720s 1447.125us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.140s 61.231us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 28.040s 3559.023us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 2.360s 437.376us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 14.720s 1447.125us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 0.880s 23.965us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_sideload_invalid 105314665991016032621804927286847564077233171544805597013015373586263744197797 76
UVM_INFO @ 7026326 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 28912834298204816149137330940818432062974705584392910384463061542412365537669 77
UVM_INFO @ 29899878 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 50940978209447685505051214474614718931351694081934603577287675483143321102492 77
UVM_INFO @ 68966457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 21864951274852778247679994974670177340178299769889174893262758222280466233411 81
UVM_INFO @ 485188585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 15311258271025138660761031900615255296223159573283785371098616230928507322132 78
UVM_INFO @ 659909104 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 45090527112491590927433898256587104201105374612305308770837305928197162980915 77
UVM_INFO @ 51373985 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 83348124416221041276398662429967861827480572557895106269963048577668046773747 94
UVM_INFO @ 23965244 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 35911855249483589488686006479461270132614475877853760678698417650930009481046 78
UVM_INFO @ 437376320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 79091480575692675211696731958622420272779674397330076932969758784300836152427 125
UVM_INFO @ 9314445030 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 12066385532648833094227113126939135276853844398282562257367239712236478364398 78
UVM_ERROR @ 157973685 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 157973685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---