Simulation Results: mbx

 
08/07/2026 19:40:29 DVSim: v1.49.12 sha: 197a519 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.48 %
  • code
  • 89.40 %
  • assert
  • 97.15 %
  • func
  • 75.88 %
  • block
  • 96.88 %
  • line
  • 96.71 %
  • branch
  • 91.89 %
  • toggle
  • 79.59 %
Validation stages
V1
83.33%
V2
81.82%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 46.000s 15119.684us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 84.316us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 11.278us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 4.000s 753.052us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 1.000s 39.037us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 2.000s 1.315us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 11.278us 1 1 100.00
mbx_csr_aliasing 1.000s 39.037us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 0 1 0.00
mbx_stress 3.000s 197.462us 0 1 0.00
mbx_max_activity 1 1 100.00
mbx_stress_zero_delays 132.000s 8475.845us 1 1 100.00
mbx_imbx_oob 1 1 100.00
mbx_imbx_oob 10.000s 500.226us 1 1 100.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 9.000s 775.978us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 1.000s 43.856us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 1.000s 54.809us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 1.000s 13.463us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 1.000s 13.463us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 84.316us 1 1 100.00
mbx_csr_rw 1.000s 11.278us 1 1 100.00
mbx_csr_aliasing 1.000s 39.037us 1 1 100.00
mbx_same_csr_outstanding 2.000s 25.866us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 84.316us 1 1 100.00
mbx_csr_rw 1.000s 11.278us 1 1 100.00
mbx_csr_aliasing 1.000s 39.037us 1 1 100.00
mbx_same_csr_outstanding 2.000s 25.866us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 2.000s 157.025us 1 1 100.00
mbx_sec_cm 1.000s 16.448us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:582) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *). 2 test runs
mbx_tl_errors 59833929971271308016639331317310806491322662195938589266008629169249246091860 85
TL item was: req: (cip_tl_seq_item@19732) { a_addr: 'h6ab98110 a_data: 'hf5e33cf2 a_mask: 'h1 a_size: 'h1 a_param: 'h0 a_source: 'h53 a_opcode: 'h1 a_user: 'h25ec0 d_param: 'h0 d_source: 'h53 d_data: 'h0 d_size: 'h1 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h10aa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 13463493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 27435181971726031799873330325244717059516690292643469524959645420275380345301 86
TL item was: req: (cip_tl_seq_item@17989) { a_addr: 'h46a99a30 a_data: 'ha198c4d9 a_mask: 'h2 a_size: 'h1 a_param: 'h0 a_source: 'h7f a_opcode: 'h1 a_user: 'h25fd8 d_param: 'h0 d_source: 'h7f d_data: 'h0 d_size: 'h1 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h10aa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 1314851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (mbx_scoreboard.sv:500) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) RDATA read data mismatched 1 test run
mbx_stress 63931066761728348602262878012461071111106569201144473456509922825987287668977 156
UVM_INFO @ 197461794 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---