Simulation Results: kmac/unmasked

 
09/07/2026 19:39:29 DVSim: v1.49.12 sha: 527817d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 78.90 %
  • code
  • 66.44 %
  • assert
  • 95.62 %
  • func
  • 74.65 %
  • line
  • 92.87 %
  • branch
  • 87.20 %
  • cond
  • 84.33 %
  • toggle
  • 27.64 %
  • FSM
  • 40.15 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 32.020s 2157.368us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.990s 24.824us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.120s 67.909us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 12.350s 854.935us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.690s 286.543us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.580s 45.998us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.120s 67.909us 1 1 100.00
kmac_csr_aliasing 3.690s 286.543us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 1.080s 11.407us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.500s 59.930us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2266.220s 367684.698us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 159.070s 25478.123us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 25.520s 890.322us 1 1 100.00
kmac_test_vectors_sha3_256 32.290s 2905.028us 1 1 100.00
kmac_test_vectors_sha3_384 1465.020s 169526.370us 1 1 100.00
kmac_test_vectors_sha3_512 957.250s 102388.695us 1 1 100.00
kmac_test_vectors_shake_128 119.750s 19235.241us 1 1 100.00
kmac_test_vectors_shake_256 238.280s 29625.081us 1 1 100.00
kmac_test_vectors_kmac 2.440s 379.996us 1 1 100.00
kmac_test_vectors_kmac_xof 1.760s 166.557us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 247.540s 32867.201us 1 1 100.00
app 0 1 0.00
kmac_app 5.670s 158.227us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 7.970s 171.556us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 1.170s 94.762us 0 1 0.00
error 0 1 0.00
kmac_error 57.390s 1155.558us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.100s 321.405us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 35.570s 10020.317us 0 1 0.00
edn_timeout_error 0 1 0.00
kmac_edn_timeout_error 13.190s 1878.718us 0 1 0.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 36.390s 4852.101us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.960s 12.387us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.380s 94.054us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 523.080s 220677.737us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 1.110s 15.089us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.960s 30.405us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.070s 42.114us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.070s 42.114us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.990s 24.824us 1 1 100.00
kmac_csr_rw 1.120s 67.909us 1 1 100.00
kmac_csr_aliasing 3.690s 286.543us 1 1 100.00
kmac_same_csr_outstanding 2.180s 472.257us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.990s 24.824us 1 1 100.00
kmac_csr_rw 1.120s 67.909us 1 1 100.00
kmac_csr_aliasing 3.690s 286.543us 1 1 100.00
kmac_same_csr_outstanding 2.180s 472.257us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.680s 315.472us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.680s 315.472us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.680s 315.472us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.680s 315.472us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.630s 190.383us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 43.860s 7426.406us 1 1 100.00
kmac_tl_intg_err 2.970s 547.771us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.970s 547.771us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.380s 94.054us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 32.020s 2157.368us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 247.540s 32867.201us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.680s 315.472us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 43.860s 7426.406us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 43.860s 7426.406us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 43.860s 7426.406us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 32.020s 2157.368us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.380s 94.054us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 43.860s 7426.406us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 2.410s 111.665us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 32.020s 2157.368us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 10.660s 1059.609us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 6 test runs
kmac_app 58564745084259064137582119287587663635764253099054687039220113943198707857776 81
UVM_INFO @ 158227358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 18278723577650713816970927480858980175245210566794379938126096605147638019211 82
UVM_INFO @ 171555907 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 58055956338518598782378036808342922474546006595689104271712929272681505035109 77
UVM_INFO @ 94762037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 74445614383764167627904228991854888833731935039257790933907227532490619603081 110
UVM_INFO @ 1155557603 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 29538184408828223028141084539321923061554799447598450595306837590106636524290 77
UVM_INFO @ 12386570 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 43145811764243269493049006138891086280810042221338041023884674174829243293797 144
UVM_INFO @ 1059609311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_key_error 78059148981102806250405079561100382416858113764157041749348233819606827386387 78
UVM_ERROR @ 321405434 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 321405434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_edn_timeout_error 35059403746967368687408582863654036201345459755339340419187776730848196491331 85
UVM_ERROR @ 1878717961 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 1878717961 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) 1 test run
kmac_sideload_invalid 1402435291137148640869382188928939626731412363938171687663921992652631823577 78
UVM_INFO @ 10020316925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 8852603338509797601965078328025581509193353077782593402837199883190782169963 78
UVM_INFO @ 111664840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---