Simulation Results: aes/gcm_masked

 
13/07/2026 19:40:35 DVSim: v1.49.12 sha: 68eb7b5 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.43 %
  • code
  • 95.64 %
  • assert
  • 98.29 %
  • func
  • 68.35 %
  • block
  • 95.80 %
  • line
  • 97.50 %
  • branch
  • 89.58 %
  • toggle
  • 98.05 %
  • FSM
  • 97.42 %
Validation stages
V1
100.00%
V2
100.00%
V2S
88.89%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 59.010us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 128.787us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 61.098us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 89.649us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 4.000s 265.719us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 166.028us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 101.512us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 89.649us 1 1 100.00
aes_csr_aliasing 2.000s 166.028us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 128.787us 1 1 100.00
aes_config_error 7.000s 283.631us 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 128.787us 1 1 100.00
aes_config_error 7.000s 283.631us 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
back2back 2 2 100.00
aes_stress 2.000s 73.995us 1 1 100.00
aes_b2b 13.000s 977.246us 1 1 100.00
backpressure 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 128.787us 1 1 100.00
aes_config_error 7.000s 283.631us 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
aes_alert_reset 4.000s 327.837us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 191.241us 1 1 100.00
aes_config_error 7.000s 283.631us 1 1 100.00
aes_alert_reset 4.000s 327.837us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 3.000s 443.980us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 7.000s 380.804us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 7.000s 684.552us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 4.000s 327.837us 1 1 100.00
stress 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
sideload 2 2 100.00
aes_stress 2.000s 73.995us 1 1 100.00
aes_sideload 3.000s 76.559us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 2.000s 177.913us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 20.000s 555.266us 1 1 100.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 4.000s 265.714us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 74.852us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 146.810us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 146.810us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 61.098us 1 1 100.00
aes_csr_rw 1.000s 89.649us 1 1 100.00
aes_csr_aliasing 2.000s 166.028us 1 1 100.00
aes_same_csr_outstanding 2.000s 144.953us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 61.098us 1 1 100.00
aes_csr_rw 1.000s 89.649us 1 1 100.00
aes_csr_aliasing 2.000s 166.028us 1 1 100.00
aes_same_csr_outstanding 2.000s 144.953us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 0 1 0.00
aes_reseed 2.000s 43.270us 0 1 0.00
fault_inject 2 3 66.67
aes_fi 3602.000s 0.000us 0 1 0.00
aes_control_fi 3.000s 52.867us 1 1 100.00
aes_cipher_fi 2.000s 114.576us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 102.020us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 102.020us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 102.020us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 102.020us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 2.000s 208.544us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 7.000s 2460.196us 1 1 100.00
aes_tl_intg_err 2.000s 157.145us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 157.145us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 4.000s 327.837us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 102.020us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 102.020us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 3.000s 128.787us 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
aes_alert_reset 4.000s 327.837us 1 1 100.00
aes_core_fi 4.000s 618.039us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 4.000s 265.714us 1 1 100.00
aes_config_error 7.000s 283.631us 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
aes_core_fi 4.000s 618.039us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 102.020us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 195.186us 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 2.000s 73.995us 1 1 100.00
aes_sideload 3.000s 76.559us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 195.186us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 195.186us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 195.186us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 195.186us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 195.186us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 2.000s 73.995us 1 1 100.00
sec_cm_main_fsm_sparse 0 1 0.00
aes_fi 3602.000s 0.000us 0 1 0.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 3602.000s 0.000us 0 1 0.00
aes_control_fi 3.000s 52.867us 1 1 100.00
aes_cipher_fi 2.000s 114.576us 1 1 100.00
aes_ctr_fi 2.000s 60.859us 1 1 100.00
sec_cm_cipher_fsm_sparse 0 1 0.00
aes_fi 3602.000s 0.000us 0 1 0.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 3602.000s 0.000us 0 1 0.00
aes_control_fi 3.000s 52.867us 1 1 100.00
aes_cipher_fi 2.000s 114.576us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 114.576us 1 1 100.00
sec_cm_ctr_fsm_sparse 0 1 0.00
aes_fi 3602.000s 0.000us 0 1 0.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 3602.000s 0.000us 0 1 0.00
aes_control_fi 3.000s 52.867us 1 1 100.00
aes_ctr_fi 2.000s 60.859us 1 1 100.00
sec_cm_ghash_fsm_sparse 0 1 0.00
aes_fi 3602.000s 0.000us 0 1 0.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 3602.000s 0.000us 0 1 0.00
aes_control_fi 3.000s 52.867us 1 1 100.00
aes_cipher_fi 2.000s 114.576us 1 1 100.00
aes_ctr_fi 2.000s 60.859us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 4.000s 327.837us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 3602.000s 0.000us 0 1 0.00
aes_control_fi 3.000s 52.867us 1 1 100.00
aes_cipher_fi 2.000s 114.576us 1 1 100.00
aes_ctr_fi 2.000s 60.859us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 3602.000s 0.000us 0 1 0.00
aes_control_fi 3.000s 52.867us 1 1 100.00
aes_cipher_fi 2.000s 114.576us 1 1 100.00
aes_ctr_fi 2.000s 60.859us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 3602.000s 0.000us 0 1 0.00
aes_control_fi 3.000s 52.867us 1 1 100.00
aes_ctr_fi 2.000s 60.859us 1 1 100.00
sec_cm_ghash_fsm_local_esc 1 2 50.00
aes_ghash_fi 2.000s 76.017us 1 1 100.00
aes_fi 3602.000s 0.000us 0 1 0.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 3602.000s 0.000us 0 1 0.00
aes_control_fi 3.000s 52.867us 1 1 100.00
aes_cipher_fi 2.000s 114.576us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 6.000s 505.030us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'parent_sequence' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues 2 test runs
aes_reseed 25465717984276042553935288194352680608424669424542737586793467867371518564943 2345
UVM_INFO @ 43270459 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
aes_stress_all_with_rand_reset 101602789145561630387967492971415232665904845842009774338382636534976772028773 347
UVM_INFO @ 505029995 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job timed out after * minutes 1 test run
aes_fi 77982471231843234388077391160650133475550156607813637104430621967785971221000 None