Simulation Results: entropy_src/rng_16bits

 
13/07/2026 19:40:35 DVSim: v1.49.12 sha: 68eb7b5 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 70.09 %
  • code
  • 82.57 %
  • assert
  • 74.20 %
  • func
  • 53.51 %
  • block
  • 94.16 %
  • line
  • 97.84 %
  • branch
  • 86.18 %
  • toggle
  • 52.51 %
  • FSM
  • 93.75 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 17.632us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 268.075us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 76.838us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 8.000s 431.911us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 2.000s 39.992us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 44.800us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 76.838us 1 1 100.00
entropy_src_csr_aliasing 2.000s 39.992us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 17.632us 1 1 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
entropy_src_fw_ov 134.000s 13109.442us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 134.000s 13109.442us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 121.000s 14054.739us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
entropy_src_intr 2.000s 151.767us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
entropy_src_functional_alerts 5.000s 761.317us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 2.000s 49.576us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 1.000s 129.898us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 2.000s 93.785us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 51.135us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 1.000s 14.166us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 5.000s 139.311us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 5.000s 139.311us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 268.075us 1 1 100.00
entropy_src_csr_rw 2.000s 76.838us 1 1 100.00
entropy_src_csr_aliasing 2.000s 39.992us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 261.208us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 268.075us 1 1 100.00
entropy_src_csr_rw 2.000s 76.838us 1 1 100.00
entropy_src_csr_aliasing 2.000s 39.992us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 261.208us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 3.000s 94.144us 1 1 100.00
entropy_src_tl_intg_err 4.000s 202.680us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
entropy_src_cfg_regwen 1.000s 76.025us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
entropy_src_fw_ov 134.000s 13109.442us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 1.000s 129.898us 1 1 100.00
entropy_src_sec_cm 3.000s 94.144us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 1.000s 129.898us 1 1 100.00
entropy_src_sec_cm 3.000s 94.144us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 166.000s 13022.979us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 1.000s 129.898us 1 1 100.00
entropy_src_sec_cm 3.000s 94.144us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 1.000s 129.898us 1 1 100.00
entropy_src_sec_cm 3.000s 94.144us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 1.000s 129.898us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 5.000s 761.317us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 4.000s 202.680us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 363.000s 14041.967us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 9.000s 1478.745us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (entropy_src_scoreboard.sv:1663) scoreboard [scoreboard] invalid csr: entropy_src_reg_block.extht_hi_threshold 1 test run
entropy_src_stress_all_with_rand_reset 13839326314929898672651513651415749737785115375219174396944813435881062598744 117
UVM_INFO @ 1478745387 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror adaptp_lo_total_fails 1 test run
entropy_src_csr_mem_rw_with_rand_reset 89506947164043452761176409820320231788861462966531455297974370585829404757369 113
UVM_INFO @ 44800322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---