Simulation Results: kmac/unmasked

 
13/07/2026 19:40:35 DVSim: v1.49.12 sha: 68eb7b5 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.00 %
  • code
  • 66.99 %
  • assert
  • 97.23 %
  • func
  • 75.77 %
  • line
  • 93.86 %
  • branch
  • 88.35 %
  • cond
  • 83.77 %
  • toggle
  • 27.34 %
  • FSM
  • 41.61 %
Validation stages
V1
100.00%
V2
75.86%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 27.480s 4996.015us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.200s 20.160us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.120s 24.233us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 16.130s 1842.461us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 8.800s 1468.404us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.710s 44.459us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.120s 24.233us 1 1 100.00
kmac_csr_aliasing 8.800s 1468.404us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.890s 24.141us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.220s 118.063us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 612.030s 11729.175us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 560.720s 21755.808us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1442.940s 27638.983us 1 1 100.00
kmac_test_vectors_sha3_256 1385.870s 25603.065us 1 1 100.00
kmac_test_vectors_sha3_384 19.240s 2542.241us 1 1 100.00
kmac_test_vectors_sha3_512 12.600s 374.114us 1 1 100.00
kmac_test_vectors_shake_128 2417.490s 238562.611us 1 1 100.00
kmac_test_vectors_shake_256 110.010s 35715.442us 1 1 100.00
kmac_test_vectors_kmac 1.650s 87.555us 1 1 100.00
kmac_test_vectors_kmac_xof 2.420s 411.426us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 204.720s 4572.610us 1 1 100.00
app 0 1 0.00
kmac_app 6.250s 1161.063us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.500s 257.470us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 2.850s 47.735us 0 1 0.00
error 0 1 0.00
kmac_error 39.340s 4167.471us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.370s 54.486us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.840s 6.688us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 9.450s 429.974us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 20.680s 15972.016us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.760s 5.339us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.090s 58.234us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 533.590s 27488.497us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.780s 30.090us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.810s 16.879us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.880s 96.836us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.880s 96.836us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.200s 20.160us 1 1 100.00
kmac_csr_rw 1.120s 24.233us 1 1 100.00
kmac_csr_aliasing 8.800s 1468.404us 1 1 100.00
kmac_same_csr_outstanding 2.090s 125.568us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.200s 20.160us 1 1 100.00
kmac_csr_rw 1.120s 24.233us 1 1 100.00
kmac_csr_aliasing 8.800s 1468.404us 1 1 100.00
kmac_same_csr_outstanding 2.090s 125.568us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.420s 46.292us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.420s 46.292us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.420s 46.292us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.420s 46.292us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.090s 55.991us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 44.230s 10470.676us 1 1 100.00
kmac_tl_intg_err 5.090s 483.128us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 5.090s 483.128us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.090s 58.234us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 27.480s 4996.015us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 204.720s 4572.610us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.420s 46.292us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 44.230s 10470.676us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 44.230s 10470.676us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 44.230s 10470.676us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 27.480s 4996.015us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.090s 58.234us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 44.230s 10470.676us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 5.520s 2087.389us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 27.480s 4996.015us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 16.210s 1666.376us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_sideload_invalid 74556926826695449723088024238548941089225259607983824918337707310822450316980 76
UVM_INFO @ 6688141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 88878363901836659501983620415035719427990839926888877767472247834703762486310 81
UVM_INFO @ 1161062775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 42319312364600900523928661617685439680913387298422753363868345451991584962256 77
UVM_INFO @ 257470153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 71930024876797632198404133986666255910336432975148445155722579578192991808041 78
UVM_INFO @ 47735473 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 105436026845352235491808870729398408443217359621095142967766773778483391480067 108
UVM_INFO @ 4167470660 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 90697186626345757870632694671537016487246004530073240791482087339733945753827 77
UVM_INFO @ 5338949 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 89100963426496015234568385456825143369227477652845519491868270090320784008544 162
UVM_INFO @ 1666376331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 37490046112476663821141292299710900579741737481546384616131751016152774342467 79
UVM_INFO @ 2087389139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 74248848338891093450439054845081430631412003310895931714803435001431151512278 78
UVM_ERROR @ 54485653 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 54485653 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---