Simulation Results: mbx

 
13/07/2026 19:40:35 DVSim: v1.49.12 sha: 68eb7b5 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.27 %
  • code
  • 89.28 %
  • assert
  • 97.72 %
  • func
  • 77.82 %
  • block
  • 96.76 %
  • line
  • 96.64 %
  • branch
  • 91.53 %
  • toggle
  • 79.67 %
Validation stages
V1
83.33%
V2
81.82%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 41.000s 6972.926us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 15.641us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 28.411us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 3.000s 353.054us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 1.000s 13.657us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
mbx_csr_mem_rw_with_rand_reset 1.000s 7.454us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 28.411us 1 1 100.00
mbx_csr_aliasing 1.000s 13.657us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 1 1 100.00
mbx_stress 23.000s 10670.215us 1 1 100.00
mbx_max_activity 0 1 0.00
mbx_stress_zero_delays 10.000s 1633.745us 0 1 0.00
mbx_imbx_oob 1 1 100.00
mbx_imbx_oob 25.000s 1386.889us 1 1 100.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 15.000s 1469.233us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 2.000s 60.273us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 1.000s 114.374us 1 1 100.00
tl_d_oob_addr_access 0 1 0.00
mbx_tl_errors 2.000s 2.003us 0 1 0.00
tl_d_illegal_access 0 1 0.00
mbx_tl_errors 2.000s 2.003us 0 1 0.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 15.641us 1 1 100.00
mbx_csr_rw 1.000s 28.411us 1 1 100.00
mbx_csr_aliasing 1.000s 13.657us 1 1 100.00
mbx_same_csr_outstanding 1.000s 20.005us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 15.641us 1 1 100.00
mbx_csr_rw 1.000s 28.411us 1 1 100.00
mbx_csr_aliasing 1.000s 13.657us 1 1 100.00
mbx_same_csr_outstanding 1.000s 20.005us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_tl_intg_err 2.000s 158.543us 1 1 100.00
mbx_sec_cm 1.000s 27.490us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:582) scoreboard [scoreboard] On interface mbx_soc_reg_block, item had unexpected d_error value(predicted *, but saw *). 2 test runs
mbx_tl_errors 26998607087777348880822197280135127837648045447644880642172925447943998451626 85
TL item was: req: (cip_tl_seq_item@17639) { a_addr: 'ha10282f0 a_data: 'h92e2ade0 a_mask: 'h6 a_size: 'h2 a_param: 'h0 a_source: 'h9b a_opcode: 'h1 a_user: 'h269a2 d_param: 'h0 d_source: 'h9b d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 2002772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_csr_mem_rw_with_rand_reset 22894346304112599034857705707991016023271309741097890600401372108393043467321 86
TL item was: req: (cip_tl_seq_item@20438) { a_addr: 'h608aad74 a_data: 'h2c7891e a_mask: 'ha a_size: 'h2 a_param: 'h0 a_source: 'hc3 a_opcode: 'h1 a_user: 'h2609d d_param: 'h0 d_source: 'hc3 d_data: 'h0 d_size: 'h2 d_opcode: 'h0 d_error: 'h0 d_sink: 'h0 d_user: 'h1caa a_valid_delay: 'h0 d_valid_delay: 'h0 a_valid_len: 'h0 d_valid_len: 'h0 req_abort_after_a_valid_len: 'h0 rsp_abort_after_d_valid_len: 'h0 req_completed: 'h0 rsp_completed: 'h0 tl_intg_err_type: TlIntgErrNone max_ecc_errors: 'h3 }
Reasons for predicted error: '{"Unsupported partial write"}.
UVM_INFO @ 7453859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (mbx_scoreboard.sv:500) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) RDATA read data mismatched 1 test run
mbx_stress_zero_delays 57741569273265442205643525509960583214156673801320721932452379319149657759358 353
UVM_INFO @ 1633744522 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---