Simulation Results: kmac/unmasked

 
14/07/2026 19:40:28 DVSim: v1.49.12 sha: 84f5285 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.13 %
  • code
  • 67.22 %
  • assert
  • 98.25 %
  • func
  • 74.93 %
  • line
  • 93.86 %
  • branch
  • 87.89 %
  • cond
  • 86.04 %
  • toggle
  • 27.43 %
  • FSM
  • 40.88 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 30.680s 10747.384us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.340s 61.587us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.230s 32.618us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.900s 952.216us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 5.130s 505.921us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.070s 36.699us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.230s 32.618us 1 1 100.00
kmac_csr_aliasing 5.130s 505.921us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 1.080s 12.835us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.840s 40.246us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1297.230s 45169.078us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 32.230s 12477.052us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1409.660s 26161.885us 1 1 100.00
kmac_test_vectors_sha3_256 2032.830s 112123.450us 1 1 100.00
kmac_test_vectors_sha3_384 23.610s 3732.536us 1 1 100.00
kmac_test_vectors_sha3_512 1005.860s 950032.853us 1 1 100.00
kmac_test_vectors_shake_128 165.380s 73471.305us 1 1 100.00
kmac_test_vectors_shake_256 98.080s 15229.687us 1 1 100.00
kmac_test_vectors_kmac 2.040s 1728.515us 1 1 100.00
kmac_test_vectors_kmac_xof 2.300s 153.423us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 249.930s 15928.339us 1 1 100.00
app 0 1 0.00
kmac_app 5.360s 717.716us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.450s 553.583us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 10.610s 1893.653us 0 1 0.00
error 0 1 0.00
kmac_error 48.050s 6544.187us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.060s 38.616us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.000s 7.263us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 20.450s 8666.640us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 3.400s 910.693us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.130s 313.638us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.780s 211.000us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 4.720s 558.725us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.910s 50.220us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.940s 57.018us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.710s 167.936us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.710s 167.936us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.340s 61.587us 1 1 100.00
kmac_csr_rw 1.230s 32.618us 1 1 100.00
kmac_csr_aliasing 5.130s 505.921us 1 1 100.00
kmac_same_csr_outstanding 2.510s 846.009us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.340s 61.587us 1 1 100.00
kmac_csr_rw 1.230s 32.618us 1 1 100.00
kmac_csr_aliasing 5.130s 505.921us 1 1 100.00
kmac_same_csr_outstanding 2.510s 846.009us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.770s 104.387us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.770s 104.387us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.770s 104.387us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.770s 104.387us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.080s 2569.075us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 39.150s 4413.196us 1 1 100.00
kmac_tl_intg_err 2.470s 222.616us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.470s 222.616us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.780s 211.000us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 30.680s 10747.384us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 249.930s 15928.339us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.770s 104.387us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 39.150s 4413.196us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 39.150s 4413.196us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 39.150s 4413.196us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 30.680s 10747.384us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.780s 211.000us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 39.150s 4413.196us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 1.300s 274.283us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 30.680s 10747.384us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 3.350s 68.956us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_sideload_invalid 29258618645831278760397370490079393440138655607080987193667234868572055330273 76
UVM_INFO @ 7262876 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 63098611861146706024391226332854388422389752438705296312581745075587609786784 78
UVM_INFO @ 717715918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 72646266079444947088533471778210436918997870147688040145002599912362114915866 77
UVM_INFO @ 553582503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 62128299622030411559820209117915897269633434141962364795062910185349812655942 80
UVM_INFO @ 1893652594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 39544690292954355034315266670998797059459435031329882481419455501387179512623 103
UVM_INFO @ 6544186819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 12887932480562421416744800843474650435639835950290893641498116857813540808613 77
UVM_INFO @ 313638184 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 80518306699292399889561116774850203595090452837949946709510638611844079763357 96
UVM_INFO @ 68955563 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 91189146843289627104353091837478314586982930863630997998027408255035285875328 77
UVM_INFO @ 274283146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 44096241121221861972063359868026109260958512824291489311772519834448445025991 96
UVM_INFO @ 558725431 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 32387827854383388670664502550827846703285780385126055152475414168739529868782 78
UVM_ERROR @ 38615833 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 38615833 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---