Simulation Results: kmac/unmasked

 
15/07/2026 19:40:28 DVSim: v1.49.12 sha: 62fb2eb json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.15 %
  • code
  • 67.17 %
  • assert
  • 97.37 %
  • func
  • 75.91 %
  • line
  • 93.86 %
  • branch
  • 87.97 %
  • cond
  • 84.33 %
  • toggle
  • 27.36 %
  • FSM
  • 42.34 %
Validation stages
V1
100.00%
V2
68.97%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 37.450s 3405.631us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.930s 21.333us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.180s 102.372us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 7.570s 217.189us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 4.560s 959.998us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.480s 23.655us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.180s 102.372us 1 1 100.00
kmac_csr_aliasing 4.560s 959.998us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.940s 12.468us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.140s 194.453us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1275.500s 23347.587us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 173.170s 25715.318us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 2035.270s 99161.137us 1 1 100.00
kmac_test_vectors_sha3_256 31.420s 2932.147us 1 1 100.00
kmac_test_vectors_sha3_384 865.460s 18851.422us 1 1 100.00
kmac_test_vectors_sha3_512 911.610s 235722.340us 1 1 100.00
kmac_test_vectors_shake_128 159.050s 12167.428us 1 1 100.00
kmac_test_vectors_shake_256 2001.260s 111750.939us 1 1 100.00
kmac_test_vectors_kmac 1.670s 39.902us 1 1 100.00
kmac_test_vectors_kmac_xof 3.730s 496.748us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 122.700s 2795.217us 1 1 100.00
app 0 1 0.00
kmac_app 2.250s 109.154us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 8.750s 456.124us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 1.060s 47.433us 0 1 0.00
error 0 1 0.00
kmac_error 17.140s 1054.583us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.100s 16.612us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.810s 6.272us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 37.430s 2660.961us 1 1 100.00
entropy_mode_error 0 1 0.00
kmac_entropy_mode_error 18.800s 871.104us 0 1 0.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.880s 30.175us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.330s 58.079us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 3.180s 136.386us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 1.100s 17.202us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.180s 18.283us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 3.290s 783.617us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 3.290s 783.617us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.930s 21.333us 1 1 100.00
kmac_csr_rw 1.180s 102.372us 1 1 100.00
kmac_csr_aliasing 4.560s 959.998us 1 1 100.00
kmac_same_csr_outstanding 1.640s 332.055us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.930s 21.333us 1 1 100.00
kmac_csr_rw 1.180s 102.372us 1 1 100.00
kmac_csr_aliasing 4.560s 959.998us 1 1 100.00
kmac_same_csr_outstanding 1.640s 332.055us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.240s 79.998us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.240s 79.998us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.240s 79.998us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.240s 79.998us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.010s 75.914us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 18.340s 6911.947us 1 1 100.00
kmac_tl_intg_err 4.940s 267.007us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 4.940s 267.007us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.330s 58.079us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 37.450s 3405.631us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 122.700s 2795.217us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.240s 79.998us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 18.340s 6911.947us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 18.340s 6911.947us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 18.340s 6911.947us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 37.450s 3405.631us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.330s 58.079us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 18.340s 6911.947us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 4.620s 4516.509us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 37.450s 3405.631us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 17.750s 6389.527us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 6 test runs
kmac_app 114124849688523288775115757708564234495109734065595433513806153856297293951943 78
UVM_INFO @ 109153532 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 66422484084726070134101283362949616933447056713524716551165438796993338270322 81
UVM_INFO @ 456124054 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 58494533011453969893291888719562142873825736662353739427361780164726484165640 77
UVM_INFO @ 47433350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 72837194457787759795826718230939091406302982954566372436617494296283251945423 87
UVM_INFO @ 1054583118 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 21742818974278445928911326408739116463754362503056873596235809127932741923903 77
UVM_INFO @ 30175077 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 36582387583420126984468838354908247469637315852769118743618083982780079963353 183
UVM_INFO @ 6389527468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 3 test runs
kmac_sideload_invalid 67567754353763996986537477919892739484154011283293585926720564141604253742309 79
UVM_ERROR @ 6271849 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 6271849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 3480508613224332822221133644861544159693158409563720801040387834213987050301 78
UVM_ERROR @ 16612172 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 16612172 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_mode_error 68648080747804662586801445376561037165679416294926123125010382279506676505610 93
UVM_ERROR @ 871103700 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 871103700 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 57047620540677131247341636497276371505848086503093582483210962559567546595520 80
UVM_INFO @ 4516508780 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 99931786245141159828746744113940891326559628693894769612054526787433934158151 81
UVM_INFO @ 136386441 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---