Simulation Results: entropy_src/rng_16bits

 
16/07/2026 19:40:29 DVSim: v1.49.12 sha: f3c0267 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 66.43 %
  • code
  • 80.81 %
  • assert
  • 73.64 %
  • func
  • 44.83 %
  • block
  • 93.99 %
  • line
  • 97.67 %
  • branch
  • 85.79 %
  • toggle
  • 52.28 %
  • FSM
  • 87.50 %
Validation stages
V1
83.33%
V2
93.75%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 31.983us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 29.461us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 26.744us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 8.000s 453.242us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 3.000s 104.128us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 201.933us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 26.744us 1 1 100.00
entropy_src_csr_aliasing 3.000s 104.128us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 2.000s 31.983us 1 1 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
entropy_src_fw_ov 38.000s 14424.562us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 38.000s 14424.562us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
rng_max_rate 0 1 0.00
entropy_src_rng_max_rate 65.000s 3339.637us 0 1 0.00
health_checks 1 1 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
entropy_src_intr 2.000s 135.119us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
entropy_src_functional_alerts 5.000s 179.740us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 24.000s 13535.073us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 43.083us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 2.000s 26.819us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 13.395us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 1.000s 23.423us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 4.000s 494.385us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 4.000s 494.385us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 29.461us 1 1 100.00
entropy_src_csr_rw 2.000s 26.744us 1 1 100.00
entropy_src_csr_aliasing 3.000s 104.128us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 85.744us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 29.461us 1 1 100.00
entropy_src_csr_rw 2.000s 26.744us 1 1 100.00
entropy_src_csr_aliasing 3.000s 104.128us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 85.744us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 106.766us 1 1 100.00
entropy_src_tl_intg_err 4.000s 121.805us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
entropy_src_cfg_regwen 1.000s 285.143us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
entropy_src_fw_ov 38.000s 14424.562us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 43.083us 1 1 100.00
entropy_src_sec_cm 2.000s 106.766us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 43.083us 1 1 100.00
entropy_src_sec_cm 2.000s 106.766us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 202.000s 13043.670us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 43.083us 1 1 100.00
entropy_src_sec_cm 2.000s 106.766us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 43.083us 1 1 100.00
entropy_src_sec_cm 2.000s 106.766us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 43.083us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 5.000s 179.740us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 4.000s 121.805us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 72.000s 13268.462us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 23.000s 6545.377us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (entropy_src_scoreboard.sv:2942) [scoreboard] Check failed prediction == csr_val (* [*] vs * [*]) Prediction for observe FIFO access failed. 1 test run
entropy_src_rng_max_rate 39664311184520010202151107406555105772322887627088468360140513758230829655043 1157
UVM_INFO @ 3339636581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (entropy_src_scoreboard.sv:1663) scoreboard [scoreboard] invalid csr: entropy_src_reg_block.extht_lo_threshold 1 test run
entropy_src_stress_all_with_rand_reset 16478989754178874633119175394048336108942386444417483072164639145446467053961 958
UVM_INFO @ 6545376553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror alert_fail_counts 1 test run
entropy_src_csr_mem_rw_with_rand_reset 24568255618301240094561393211413672530298321580283560619951169422119381200165 113
UVM_INFO @ 201932940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---