Simulation Results: kmac/masked

 
16/07/2026 19:40:29 DVSim: v1.49.12 sha: f3c0267 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 82.00 %
  • code
  • 69.56 %
  • assert
  • 97.89 %
  • func
  • 78.56 %
  • line
  • 96.18 %
  • branch
  • 90.25 %
  • cond
  • 86.42 %
  • toggle
  • 29.39 %
  • FSM
  • 45.57 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 36.980s 2674.409us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.150s 73.054us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.340s 28.897us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 8.880s 834.428us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.170s 117.426us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.910s 44.177us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.340s 28.897us 1 1 100.00
kmac_csr_aliasing 3.170s 117.426us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 1.070s 12.121us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.060s 31.294us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1917.930s 210793.521us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 433.670s 26098.363us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 2289.170s 391254.611us 1 1 100.00
kmac_test_vectors_sha3_256 1556.860s 25077.603us 1 1 100.00
kmac_test_vectors_sha3_384 1847.700s 1367789.193us 1 1 100.00
kmac_test_vectors_sha3_512 16.030s 1433.988us 1 1 100.00
kmac_test_vectors_shake_128 170.810s 43153.318us 1 1 100.00
kmac_test_vectors_shake_256 1612.870s 114149.629us 1 1 100.00
kmac_test_vectors_kmac 2.940s 106.413us 1 1 100.00
kmac_test_vectors_kmac_xof 2.410s 502.086us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 341.390s 129685.908us 1 1 100.00
app 0 1 0.00
kmac_app 1.300s 82.981us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.510s 138.140us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 0.950s 8.811us 0 1 0.00
error 0 1 0.00
kmac_error 50.450s 10023.760us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 0.870s 7.949us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.900s 8.719us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 38.800s 2132.327us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 1.010s 37.468us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 0.970s 81.388us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.250s 156.879us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 135.040s 7771.578us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 1.160s 17.186us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.010s 16.020us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 3.050s 310.648us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 3.050s 310.648us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.150s 73.054us 1 1 100.00
kmac_csr_rw 1.340s 28.897us 1 1 100.00
kmac_csr_aliasing 3.170s 117.426us 1 1 100.00
kmac_same_csr_outstanding 2.200s 429.027us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.150s 73.054us 1 1 100.00
kmac_csr_rw 1.340s 28.897us 1 1 100.00
kmac_csr_aliasing 3.170s 117.426us 1 1 100.00
kmac_same_csr_outstanding 2.200s 429.027us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.200s 51.191us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.200s 51.191us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.200s 51.191us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.200s 51.191us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.420s 150.188us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 99.320s 9877.908us 1 1 100.00
kmac_tl_intg_err 4.320s 496.596us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 4.320s 496.596us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.250s 156.879us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 36.980s 2674.409us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 341.390s 129685.908us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.200s 51.191us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 99.320s 9877.908us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 99.320s 9877.908us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 99.320s 9877.908us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 36.980s 2674.409us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.250s 156.879us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 99.320s 9877.908us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 10.810s 11404.194us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 36.980s 2674.409us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 13.040s 549.469us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 5 test runs
kmac_app 108482647761057273139840397576192402427840675897832938884618457444827609652496 77
UVM_INFO @ 82981320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 96103276213830520356508986983599922224066084097297545518270367118287683062737 77
UVM_INFO @ 138139746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 91478671607550411382012369579795486423723944758082486709873718023219892726821 77
UVM_INFO @ 8811143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 114617108075242883950130640397603549951262456841507096575407134525161446822482 100
UVM_INFO @ 10023760492 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 60866838138195135488427582288227166884935979564100730423271988333182513843897 144
UVM_INFO @ 7771577942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 3 test runs
kmac_sideload_invalid 77862397456850434151549752615516854356311098757322933219859837125475543689748 79
UVM_ERROR @ 8718704 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 8718704 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_key_error 35006680080021122266632371226938664207970674289468468694917441099011729509532 78
UVM_ERROR @ 7949153 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 7949153 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 60399851162150108309132715606486988014380199058023698307157587539746172521461 78
UVM_ERROR @ 81387948 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 81387948 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 84130500167915588958483232603614053982621221805729742046611914939292541545055 82
UVM_INFO @ 11404193534 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 94484811624757929437850739380101736938287351877994980343198994878324493056466 149
UVM_INFO @ 549468553 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---