Simulation Results: alert_handler

 
20/07/2026 20:41:39 DVSim: v1.49.12 sha: 54120d8 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 90.06 %
  • code
  • 92.07 %
  • assert
  • 98.29 %
  • func
  • 79.83 %
  • line
  • 99.78 %
  • branch
  • 98.40 %
  • cond
  • 91.63 %
  • toggle
  • 89.87 %
  • FSM
  • 80.65 %
Validation stages
V1
100.00%
V2
94.74%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
alert_handler_smoke 49.580s 2993.691us 1 1 100.00
csr_hw_reset 1 1 100.00
alert_handler_csr_hw_reset 5.080s 79.907us 1 1 100.00
csr_rw 1 1 100.00
alert_handler_csr_rw 7.110s 142.785us 1 1 100.00
csr_bit_bash 1 1 100.00
alert_handler_csr_bit_bash 252.630s 6203.113us 1 1 100.00
csr_aliasing 1 1 100.00
alert_handler_csr_aliasing 47.330s 2322.447us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
alert_handler_csr_mem_rw_with_rand_reset 5.080s 326.774us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
alert_handler_csr_rw 7.110s 142.785us 1 1 100.00
alert_handler_csr_aliasing 47.330s 2322.447us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 1 1 100.00
alert_handler_esc_alert_accum 204.190s 8427.182us 1 1 100.00
esc_timeout 1 1 100.00
alert_handler_esc_intr_timeout 47.900s 5520.150us 1 1 100.00
entropy 1 1 100.00
alert_handler_entropy 2214.730s 59218.626us 1 1 100.00
sig_int_fail 1 1 100.00
alert_handler_sig_int_fail 21.810s 304.836us 1 1 100.00
clk_skew 1 1 100.00
alert_handler_smoke 49.580s 2993.691us 1 1 100.00
random_alerts 1 1 100.00
alert_handler_random_alerts 38.200s 4047.114us 1 1 100.00
random_classes 1 1 100.00
alert_handler_random_classes 11.440s 196.372us 1 1 100.00
ping_timeout 1 1 100.00
alert_handler_ping_timeout 261.940s 25643.496us 1 1 100.00
lpg 2 2 100.00
alert_handler_lpg 2482.890s 242267.675us 1 1 100.00
alert_handler_lpg_stub_clk 1985.680s 195540.764us 1 1 100.00
stress_all 1 1 100.00
alert_handler_stress_all 1413.410s 80417.349us 1 1 100.00
alert_handler_entropy_stress_test 0 1 0.00
alert_handler_entropy_stress 10.860s 303.022us 0 1 0.00
alert_handler_alert_accum_saturation 1 1 100.00
alert_handler_alert_accum_saturation 3.080s 92.955us 1 1 100.00
intr_test 1 1 100.00
alert_handler_intr_test 1.270s 7.907us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
alert_handler_tl_errors 6.640s 313.575us 1 1 100.00
tl_d_illegal_access 1 1 100.00
alert_handler_tl_errors 6.640s 313.575us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
alert_handler_csr_hw_reset 5.080s 79.907us 1 1 100.00
alert_handler_csr_rw 7.110s 142.785us 1 1 100.00
alert_handler_csr_aliasing 47.330s 2322.447us 1 1 100.00
alert_handler_same_csr_outstanding 9.330s 155.733us 1 1 100.00
tl_d_partial_access 4 4 100.00
alert_handler_csr_hw_reset 5.080s 79.907us 1 1 100.00
alert_handler_csr_rw 7.110s 142.785us 1 1 100.00
alert_handler_csr_aliasing 47.330s 2322.447us 1 1 100.00
alert_handler_same_csr_outstanding 9.330s 155.733us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
alert_handler_shadow_reg_errors 302.780s 6214.479us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
alert_handler_shadow_reg_errors 302.780s 6214.479us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
alert_handler_shadow_reg_errors 302.780s 6214.479us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
alert_handler_shadow_reg_errors 302.780s 6214.479us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
alert_handler_shadow_reg_errors_with_csr_rw 485.150s 35243.269us 1 1 100.00
tl_intg_err 2 2 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
alert_handler_tl_intg_err 2.720s 369.755us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
alert_handler_tl_intg_err 2.720s 369.755us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
alert_handler_shadow_reg_errors 302.780s 6214.479us 1 1 100.00
sec_cm_ping_timer_config_regwen 1 1 100.00
alert_handler_smoke 49.580s 2993.691us 1 1 100.00
sec_cm_alert_config_regwen 1 1 100.00
alert_handler_smoke 49.580s 2993.691us 1 1 100.00
sec_cm_alert_loc_config_regwen 1 1 100.00
alert_handler_smoke 49.580s 2993.691us 1 1 100.00
sec_cm_class_config_regwen 1 1 100.00
alert_handler_smoke 49.580s 2993.691us 1 1 100.00
sec_cm_alert_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 21.810s 304.836us 1 1 100.00
sec_cm_lpg_intersig_mubi 1 1 100.00
alert_handler_lpg 2482.890s 242267.675us 1 1 100.00
sec_cm_esc_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 21.810s 304.836us 1 1 100.00
sec_cm_alert_rx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 2214.730s 59218.626us 1 1 100.00
sec_cm_esc_tx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 2214.730s 59218.626us 1 1 100.00
sec_cm_esc_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
sec_cm_ping_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
sec_cm_esc_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
sec_cm_ping_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
sec_cm_esc_timer_fsm_global_esc 1 1 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
sec_cm_accu_ctr_redun 1 1 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
sec_cm_esc_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
sec_cm_ping_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
sec_cm_ping_timer_lfsr_redun 1 1 100.00
alert_handler_sec_cm 10.690s 1155.648us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
alert_handler_stress_all_with_rand_reset 53.290s 1248.902us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped 1 test run
alert_handler_entropy_stress 93188456027096764732364849880221056702998526882456205085279417268527058929868 154
UVM_INFO @ 303022291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 1 test run
alert_handler_stress_all_with_rand_reset 8199470804682171935898111266126130698926760604373218207048611058256737842706 111
UVM_INFO @ 1248901755 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---