Simulation Results: kmac/masked

 
20/07/2026 20:41:39 DVSim: v1.49.12 sha: 54120d8 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 81.57 %
  • code
  • 69.52 %
  • assert
  • 97.47 %
  • func
  • 77.73 %
  • line
  • 96.18 %
  • branch
  • 90.37 %
  • cond
  • 86.16 %
  • toggle
  • 29.33 %
  • FSM
  • 45.57 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 22.510s 1530.669us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.310s 35.307us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.290s 35.196us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 6.730s 244.052us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 3.040s 76.097us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.410s 37.033us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.290s 35.196us 1 1 100.00
kmac_csr_aliasing 3.040s 76.097us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 1.020s 44.858us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.370s 33.464us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 575.150s 9651.116us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 94.370s 23008.734us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 2426.700s 394702.669us 1 1 100.00
kmac_test_vectors_sha3_256 1627.360s 130332.787us 1 1 100.00
kmac_test_vectors_sha3_384 30.770s 2300.225us 1 1 100.00
kmac_test_vectors_sha3_512 1182.770s 58467.088us 1 1 100.00
kmac_test_vectors_shake_128 2774.810s 471616.200us 1 1 100.00
kmac_test_vectors_shake_256 2313.290s 425665.570us 1 1 100.00
kmac_test_vectors_kmac 2.110s 188.913us 1 1 100.00
kmac_test_vectors_kmac_xof 3.090s 95.794us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 326.700s 18367.519us 1 1 100.00
app 0 1 0.00
kmac_app 1.260s 29.292us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.610s 14.290us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 13.100s 1389.053us 0 1 0.00
error 0 1 0.00
kmac_error 7.400s 676.942us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.170s 37.044us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 2.530s 176.719us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 1.130s 31.102us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 23.790s 488.644us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.130s 74.828us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.170s 73.189us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 2.750s 711.680us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 1.040s 18.764us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.190s 28.338us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.620s 241.532us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.620s 241.532us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.310s 35.307us 1 1 100.00
kmac_csr_rw 1.290s 35.196us 1 1 100.00
kmac_csr_aliasing 3.040s 76.097us 1 1 100.00
kmac_same_csr_outstanding 1.430s 115.236us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.310s 35.307us 1 1 100.00
kmac_csr_rw 1.290s 35.196us 1 1 100.00
kmac_csr_aliasing 3.040s 76.097us 1 1 100.00
kmac_same_csr_outstanding 1.430s 115.236us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.880s 1092.635us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.880s 1092.635us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.880s 1092.635us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.880s 1092.635us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.560s 923.731us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 81.210s 12958.009us 1 1 100.00
kmac_tl_intg_err 2.550s 274.723us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.550s 274.723us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.170s 73.189us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 22.510s 1530.669us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 326.700s 18367.519us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.880s 1092.635us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 81.210s 12958.009us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 81.210s 12958.009us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 81.210s 12958.009us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 22.510s 1530.669us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.170s 73.189us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 81.210s 12958.009us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 19.720s 4476.278us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 22.510s 1530.669us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 21.170s 1732.936us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_sideload_invalid 111969835304221447594294240249460726395215136820740268149018517972902395507436 88
UVM_INFO @ 176719169 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 103876883549647529859575565580917055341603410978166264172966415815679244298341 77
UVM_INFO @ 29291782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 97369666126967611365664944903819973938911964360108653427619162073824689945957 77
UVM_INFO @ 14290407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 11278900462586435626994932739949283443624549398011374847163821615728987703221 83
UVM_INFO @ 1389053389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 5810599407817474156985466475919624270115551161035302257875721309301709855465 81
UVM_INFO @ 676941519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 19600813564025276258665976676411618904210700180098443132722114522950712241682 85
UVM_INFO @ 711680128 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 45590959729899462005761497029364837173275418243656268439791640406092233209217 144
UVM_INFO @ 1732936368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_key_error 100652627211451376339122005207715582291484520321038195560415265507470632651601 78
UVM_ERROR @ 37043620 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 37043620 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 108799395743401840566696875906840602579775468397428940706885915555209537143886 78
UVM_ERROR @ 74827917 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 74827917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 39453669674927126196869768335848494604621536524363971233384455344367914325750 85
UVM_INFO @ 4476278243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---