Simulation Results: entropy_src/rng_16bits

 
21/07/2026 19:39:46 DVSim: v1.49.12 sha: b583fba json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 70.96 %
  • code
  • 83.34 %
  • assert
  • 74.06 %
  • func
  • 55.47 %
  • block
  • 94.25 %
  • line
  • 97.90 %
  • branch
  • 86.40 %
  • toggle
  • 53.25 %
  • FSM
  • 95.83 %
Validation stages
V1
83.33%
V2
100.00%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 3.000s 59.836us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 42.467us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 141.094us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 5.000s 452.578us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 3.000s 422.186us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 35.725us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 141.094us 1 1 100.00
entropy_src_csr_aliasing 3.000s 422.186us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 3 3 100.00
entropy_src_smoke 3.000s 59.836us 1 1 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
entropy_src_fw_ov 63.000s 13074.097us 1 1 100.00
firmware_mode 1 1 100.00
entropy_src_fw_ov 63.000s 13074.097us 1 1 100.00
rng_mode 1 1 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 502.000s 13063.079us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
entropy_src_intr 17.000s 854.034us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
entropy_src_functional_alerts 5.000s 827.739us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 3.000s 116.897us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 30.564us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 7.000s 508.695us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 22.374us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 1.000s 17.546us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 3.000s 58.306us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 3.000s 58.306us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 42.467us 1 1 100.00
entropy_src_csr_rw 2.000s 141.094us 1 1 100.00
entropy_src_csr_aliasing 3.000s 422.186us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 44.726us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 42.467us 1 1 100.00
entropy_src_csr_rw 2.000s 141.094us 1 1 100.00
entropy_src_csr_aliasing 3.000s 422.186us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 44.726us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 176.235us 1 1 100.00
entropy_src_tl_intg_err 2.000s 182.594us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
entropy_src_cfg_regwen 2.000s 23.986us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
sec_cm_intersig_mubi 2 2 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
entropy_src_fw_ov 63.000s 13074.097us 1 1 100.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 30.564us 1 1 100.00
entropy_src_sec_cm 2.000s 176.235us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 30.564us 1 1 100.00
entropy_src_sec_cm 2.000s 176.235us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 322.000s 14046.107us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 30.564us 1 1 100.00
entropy_src_sec_cm 2.000s 176.235us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 30.564us 1 1 100.00
entropy_src_sec_cm 2.000s 176.235us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 30.564us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 5.000s 827.739us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 2.000s 182.594us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 327.000s 13019.493us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
entropy_src_stress_all_with_rand_reset 8.000s 334.663us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (entropy_src_scoreboard.sv:1663) scoreboard [scoreboard] invalid csr: entropy_src_reg_block.extht_hi_threshold 1 test run
entropy_src_stress_all_with_rand_reset 115734935047551603259477683928021795500033556177789812734880728017574986597167 529
UVM_INFO @ 334663151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror repcnts_total_fails 1 test run
entropy_src_csr_mem_rw_with_rand_reset 106160885585295886701647149608762805471460370075512927552786071221971756630027 113
UVM_INFO @ 35724696 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---