Simulation Results: kmac/masked

 
21/07/2026 19:39:46 DVSim: v1.49.12 sha: b583fba json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 82.36 %
  • code
  • 70.51 %
  • assert
  • 97.05 %
  • func
  • 79.53 %
  • line
  • 96.27 %
  • branch
  • 90.86 %
  • cond
  • 88.59 %
  • toggle
  • 29.35 %
  • FSM
  • 47.47 %
Validation stages
V1
100.00%
V2
68.97%
V2S
87.50%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 25.880s 8065.667us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.130s 44.392us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.020s 36.430us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 15.720s 1635.424us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 5.140s 971.475us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.510s 172.385us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.020s 36.430us 1 1 100.00
kmac_csr_aliasing 5.140s 971.475us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.800s 15.490us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.430s 61.237us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 3627.150s 275464.277us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 286.440s 17533.173us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 27.740s 30521.161us 1 1 100.00
kmac_test_vectors_sha3_256 1644.050s 25959.438us 1 1 100.00
kmac_test_vectors_sha3_384 25.310s 8452.985us 1 1 100.00
kmac_test_vectors_sha3_512 13.330s 3196.825us 1 1 100.00
kmac_test_vectors_shake_128 193.080s 16395.181us 1 1 100.00
kmac_test_vectors_shake_256 89.040s 17664.264us 1 1 100.00
kmac_test_vectors_kmac 2.380s 255.979us 1 1 100.00
kmac_test_vectors_kmac_xof 2.280s 246.411us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 319.320s 106057.278us 1 1 100.00
app 0 1 0.00
kmac_app 1.000s 106.847us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 1.660s 274.478us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 3.110s 183.713us 0 1 0.00
error 0 1 0.00
kmac_error 107.300s 6231.618us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.120s 142.143us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 1.150s 30.323us 0 1 0.00
edn_timeout_error 0 1 0.00
kmac_edn_timeout_error 13.890s 1057.363us 0 1 0.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 0.920s 28.540us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.470s 50.395us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.190s 92.809us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 1.170s 101.186us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.870s 98.273us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.030s 65.000us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.260s 62.326us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.260s 62.326us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.130s 44.392us 1 1 100.00
kmac_csr_rw 1.020s 36.430us 1 1 100.00
kmac_csr_aliasing 5.140s 971.475us 1 1 100.00
kmac_same_csr_outstanding 2.140s 459.030us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.130s 44.392us 1 1 100.00
kmac_csr_rw 1.020s 36.430us 1 1 100.00
kmac_csr_aliasing 5.140s 971.475us 1 1 100.00
kmac_same_csr_outstanding 2.140s 459.030us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.520s 45.209us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.520s 45.209us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.520s 45.209us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.520s 45.209us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.480s 463.455us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 90.160s 10241.365us 1 1 100.00
kmac_tl_intg_err 2.460s 238.959us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.460s 238.959us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.190s 92.809us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 25.880s 8065.667us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 319.320s 106057.278us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.520s 45.209us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 90.160s 10241.365us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 90.160s 10241.365us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 90.160s 10241.365us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 25.880s 8065.667us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.190s 92.809us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 90.160s 10241.365us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 17.010s 3982.347us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 25.880s 8065.667us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 169.190s 4946.484us 1 1 100.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_sideload_invalid 75820502455028291526908700357327102608851964192072516057147363377666050864377 76
UVM_INFO @ 30322623 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 73260119958576792673095676240623596045281950907852205936365102364626183349120 77
UVM_INFO @ 106846766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 28033192135826107320895945130382467555516602041762966100581364484751100052126 77
UVM_INFO @ 274477925 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 83489821671337119080912727827735293756924707342882413037965644144635135810413 78
UVM_INFO @ 183712745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 103202026606066795088526884364433036084080868387318006176126117277295595502990 126
UVM_INFO @ 6231618289 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 79071195722083937580750679666969042536116606690817786332334159406712620684814 77
UVM_INFO @ 50394849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 107989317296956148585426108629247671802141026662804542057692370569709725084041 79
UVM_INFO @ 101186367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 2 test runs
kmac_key_error 53676265933165449469273822137487092608818454646187838304713053325694320922127 78
UVM_ERROR @ 142142931 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 142142931 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_edn_timeout_error 98419906410644073895883406192426300174456082977368088482301348540589696606671 85
UVM_ERROR @ 1057362555 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 1057362555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 1 test run
kmac_mubi 57257339395449637268555340786419162297730706700078350073464523748069121099324 85
UVM_INFO @ 3982346513 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---