Simulation Results: kmac/masked

 
22/07/2026 19:39:31 DVSim: v1.50.0 sha: a22166c json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.41 %
  • code
  • 68.39 %
  • assert
  • 96.77 %
  • func
  • 76.07 %
  • line
  • 95.43 %
  • branch
  • 89.26 %
  • cond
  • 83.60 %
  • toggle
  • 29.35 %
  • FSM
  • 44.30 %
Validation stages
V1
100.00%
V2
72.41%
V2S
87.50%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 55.720s 8359.152us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.990s 75.754us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.460s 158.159us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 16.430s 7054.624us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 8.590s 465.618us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.910s 39.132us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.460s 158.159us 1 1 100.00
kmac_csr_aliasing 8.590s 465.618us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 1.020s 12.612us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.500s 144.157us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 2965.370s 938931.164us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 711.760s 44523.474us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1641.410s 26803.309us 1 1 100.00
kmac_test_vectors_sha3_256 1603.540s 26672.854us 1 1 100.00
kmac_test_vectors_sha3_384 1560.600s 343247.208us 1 1 100.00
kmac_test_vectors_sha3_512 879.700s 113009.881us 1 1 100.00
kmac_test_vectors_shake_128 182.710s 46624.833us 1 1 100.00
kmac_test_vectors_shake_256 2292.080s 111751.684us 1 1 100.00
kmac_test_vectors_kmac 2.490s 414.862us 1 1 100.00
kmac_test_vectors_kmac_xof 3.680s 553.633us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 62.450s 16240.012us 1 1 100.00
app 0 1 0.00
kmac_app 2.110s 263.032us 0 1 0.00
app_with_partial_data 0 1 0.00
kmac_app_with_partial_data 4.260s 318.697us 0 1 0.00
entropy_refresh 0 1 0.00
kmac_entropy_refresh 4.910s 265.005us 0 1 0.00
error 0 1 0.00
kmac_error 16.050s 3062.059us 0 1 0.00
key_error 0 1 0.00
kmac_key_error 1.270s 26.704us 0 1 0.00
sideload_invalid 0 1 0.00
kmac_sideload_invalid 0.950s 6.114us 0 1 0.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 1.060s 33.219us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 35.720s 3549.322us 1 1 100.00
entropy_ready_error 0 1 0.00
kmac_entropy_ready_error 1.140s 17.528us 0 1 0.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.330s 55.056us 1 1 100.00
stress_all 0 1 0.00
kmac_stress_all 4.510s 611.297us 0 1 0.00
intr_test 1 1 100.00
kmac_intr_test 0.830s 16.714us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.090s 34.078us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.370s 339.545us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.370s 339.545us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.990s 75.754us 1 1 100.00
kmac_csr_rw 1.460s 158.159us 1 1 100.00
kmac_csr_aliasing 8.590s 465.618us 1 1 100.00
kmac_same_csr_outstanding 1.540s 43.760us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.990s 75.754us 1 1 100.00
kmac_csr_rw 1.460s 158.159us 1 1 100.00
kmac_csr_aliasing 8.590s 465.618us 1 1 100.00
kmac_same_csr_outstanding 1.540s 43.760us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.420s 174.921us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.420s 174.921us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.420s 174.921us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.420s 174.921us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 3.300s 229.876us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 48.550s 19363.590us 1 1 100.00
kmac_tl_intg_err 6.110s 229.334us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 6.110s 229.334us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.330s 55.056us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 55.720s 8359.152us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 62.450s 16240.012us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.420s 174.921us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 48.550s 19363.590us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 48.550s 19363.590us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 48.550s 19363.590us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 55.720s 8359.152us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.330s 55.056us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 48.550s 19363.590us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 0 1 0.00
kmac_mubi 1.050s 91.651us 0 1 0.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 55.720s 8359.152us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
kmac_stress_all_with_rand_reset 27.080s 1375.961us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (kmac_scoreboard.sv:1671) [scoreboard] Check failed unmasked_digest[i] == dpi_digest[i] (* [*] vs * [*]) Mismatch between unmasked_digest[*] and dpi_digest[*] 7 test runs
kmac_sideload_invalid 52449961789944922586567562716767648048925968223687012001587397275053190791784 76
UVM_INFO @ 6113914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app 84152361014989906682595012204047365761454723109274344405214111353067402487465 78
UVM_INFO @ 263031713 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_app_with_partial_data 50929495537350135052391753069207170905422358718795873670538424797384228413187 78
UVM_INFO @ 318696773 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_refresh 41750100927991254165584943345273522775108920014263236058827325533981771439212 79
UVM_INFO @ 265004922 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_error 72975349788305559986202666038200237608680717200847870924517840377712378739903 82
UVM_INFO @ 3062059293 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_entropy_ready_error 48228848794153748016470512270975324325310909358781542874429974461650528654226 77
UVM_INFO @ 17528015 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all_with_rand_reset 77273367732289346729178215513323166717929950440324073208233630682983140122593 190
UVM_INFO @ 1375960670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (kmac_scoreboard.sv:557) [scoreboard] Check failed (kmac_app_rsp.error == app_intf_err) 2 test runs
kmac_mubi 72475262844693507619834775436260805923161258525012200174475651328541744632949 77
UVM_INFO @ 91650950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
kmac_stress_all 47205491425197511544672665963507562408502957337116637038761129948983532513484 81
UVM_INFO @ 611296887 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Offending '((!$isunknown(rspfifo_rdata)) -> (!$isunknown(tl_o)))' 1 test run
kmac_key_error 62826262657855463759257768996860634571974474022336331737186778077921934952398 78
UVM_ERROR @ 26704017 ps: (tlul_adapter_sram.sv:684) [ASSERT FAILED] TlOutKnownIfFifoKnown_A
UVM_INFO @ 26704017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---